Datasheet > 74HCT00D/S71,118

74HCT00D/S71,118

更新时间： 2024-11-13 09:11:07

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	123K
描述
74HC(T)00 - Quad 2-input NAND gate SOIC 14-Pin

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74HCT00D/S71,118 数据手册

74HC00; 74HCT00

Quad 2-input NAND gate

Rev. 6 — 14 December 2011

Product data sheet

1. General description

The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC

standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).

The 74HC00; 74HCT00 provides a quad 2-input NAND function.

2. Features and benefits

 Input levels:

 For 74HC00: CMOS level

 For 74HCT00: TTL level

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 C to +85 C and from 40 C to +125 C

3. Ordering information

Table 1.

Type number Package

Temperature range Name

Ordering information

Description

Version

74HC00N

40 C to +125 C

DIP14

plastic dual in-line package; 14 leads (300 mil)

SOT27-1

74HCT00N

74HC00D

40 C to +125 C

SO14

plastic small outline package; 14 leads; body width

3.9 mm

SOT108-1

74HCT00D

74HC00DB

74HCT00DB

74HC00PW

74HCT00PW

74HC00BQ

74HCT00BQ

SSOP14

TSSOP14

DHVQFN14

plastic shrink small outline package; 14 leads; body SOT337-1

width 5.3 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

plastic dual in-line compatible thermal enhanced very SOT762-1

thin quad flat package; no leads; 14 terminals;

body 2.5  3  0.85 mm

12 3 4 5 6 7...16

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