Datasheet > 74HC32DB112

74HC32DB112

更新时间： 2022-04-20 23:34:54

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
17页	138K
描述
Quad 2-input OR gate Rev.

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74HC32DB112 数据手册

74HC32; 74HCT32

NXP Semiconductors

Quad 2-input OR gate

5. Pinning information

5.1 Pinning

terminal 1

index area

(1)

GND

001aad102

GND

Transparent top view

001aad101

(1) The die substrate is attached to this pad using

conductive die attach material. It cannot be used as a

supply pin or input.

Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14

Fig 5. Pin configuration DHVQFN14

5.2 Pin description

Table 2.

Symbol

1A to 4A

1B to 4B

1Y to 4Y

GND

Pin description

Description

data input

1, 4, 9, 12

2, 5, 10,13

3, 6, 8, 11

data input

data output

ground (0 V)

supply voltage

V_CC

6. Functional description

Table 3.

Function table^[1]

Input

Output

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care.

74HC_HCT32

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 4 September 2012

3 of 17

1 234 5 6 7...17

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