Datasheet > 74HC244PW-T

74HC244PW-T

更新时间： 2024-11-18 15:29:39

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数据手册

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74HC244PW-T 数据手册

74HC244; 74HCT244

Octal buffer/line driver; 3-state

Rev. 03 — 22 December 2005

Product data sheet

1. General description

The 74HC244; 74HCT244 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL).

The 74HC244; 74HCT244 has octal non-inverting buffer/line drivers with 3-state outputs.

The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on

nOE causes the outputs to assume a high-impedance OFF-state. The 74HC244;

74HCT244 is identical to the 74HC240; 74HCT240 but has non-inverting outputs.

2. Features

■ Octal bus interface

■ Non-inverting 3-state outputs

■ Complies with JEDEC standard no. 7A

■ ESD protection:

◆ HBM EIA/JESD22-A114-C exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V

■ Multiple package options

■ Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

3. Quick reference data

Table 1:

Quick reference data

GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns

Symbol Parameter

74HC244

Conditions

Min

Typ

Max

Unit

t_PHL

t_PLH

propagation delay

nAn to nYn

V_CC= 5 V; C_L= 15 pF

C_i

input capacitance

3.5

[1]

C_PD

power dissipation

capacitance

per buffer; V_I= GND to

V_CC

74HCT244

t_PHL

t_PLH

propagation delay

nAn to nYn

V_CC= 5 V; C_L= 15 pF

C_i

input capacitance

3.5

[1]

C_PD

power dissipation

capacitance

per buffer; V_I= GND to

(V_CC− 1.5 V)

[1] C_PDis used to determine the dynamic power dissipation (P_Din µW):

P_D= C_PD× V_CC²× f_i× N + ∑(C_L× V_CC²× f_o) where:

12 3 4 5 6 7...22

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