5秒后页面跳转
74HC157 PDF预览

74HC157

更新时间: 2024-11-17 22:45:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 复用器
页数 文件大小 规格书
6页 225K
描述
Quad 2-Input Data Selectors/Multiplexers

74HC157 数据手册

 浏览型号74HC157的Datasheet PDF文件第2页浏览型号74HC157的Datasheet PDF文件第3页浏览型号74HC157的Datasheet PDF文件第4页浏览型号74HC157的Datasheet PDF文件第5页浏览型号74HC157的Datasheet PDF文件第6页 
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
16  
16  
The MC54/74HC157A is identical in pinout to the LS157. The device  
inputs are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
This device routes 2 nibbles (A or B) to a single port (Y) as determined by  
the Select input. The data is presented at the outputs in noninverted form. A  
high level on the Output Enable input sets all four Y outputs to a low level.  
The HC157A is similar in function to the HC257 which has 3–state outputs.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
16  
1
Low Input Current: 1.0 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
16  
1
Chip Complexity: 82 FETs or 20.5 Equivalent Gates  
ORDERING INFORMATION  
MC54HCXXXAJ  
MC74HCXXXAN  
MC74HCXXXAD  
MC74HCXXXADT  
Ceramic  
Plastic  
SOIC  
LOGIC DIAGRAM  
TSSOP  
2
A0  
5
A1  
PIN ASSIGNMENT  
NIBBLE  
A INPUTS  
11  
A2  
A3  
SELECT  
1
2
16  
15  
14  
V
CC  
OUTPUT  
ENABLE  
4
7
A0  
Y0  
Y1  
Y2  
Y3  
3
6
3
4
14  
13  
B0  
B1  
B2  
B3  
B0  
Y0  
A3  
B3  
DATA  
OUTPUTS  
9
NIBBLE  
B INPUTS  
12  
10  
13  
5
6
12  
11  
A1  
B1  
Y3  
A2  
7
8
10  
9
Y1  
B2  
Y2  
GND  
1
SELECT  
15  
OUTPUT  
ENABLE  
FUNCTION TABLE  
Inputs  
PIN 16 = V  
CC  
PIN 8 = GND  
Output  
Outputs  
Enable Select Y0 – Y3  
H
L
L
X
L
H
L
A0A3  
B0B3  
X = don’t care  
A0 – A3, B0 – B3 = the levels  
of the respective Data–Word  
Inputs.  
10/95  
REV 6  
Motorola, Inc. 1995  

与74HC157相关器件

型号 品牌 获取价格 描述 数据表
74HC157_10 NXP

获取价格

Quad 2-input multiplexer
74HC157BQ NXP

获取价格

Quad 2-input multiplexer
74HC157BQ NEXPERIA

获取价格

Quad 2-input multiplexerProduction
74HC157BQ-Q100 NXP

获取价格

HC/UH SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PQCC16, 2.50 X 3.50 MM, 0.85
74HC157BQ-Q100 NEXPERIA

获取价格

Quad 2-input multiplexer
74HC157D NEXPERIA

获取价格

Quad 2-input multiplexerProduction
74HC157D NXP

获取价格

Quad 2-input multiplexer
74HC157D TOSHIBA

获取价格

Not Recommended for New Design
74HC157D/T3 NXP

获取价格

IC HC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, SOT-109, SOP-16, Mul
74HC157DB NXP

获取价格

Quad 2-input multiplexer