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74HC157BQ-Q100 PDF预览

74HC157BQ-Q100

更新时间: 2024-09-27 02:57:03
品牌 Logo 应用领域
安世 - NEXPERIA 逻辑集成电路
页数 文件大小 规格书
17页 782K
描述
Quad 2-input multiplexer

74HC157BQ-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.67
系列:HC/UHJESD-30 代码:R-PQCC-N16
JESD-609代码:e4长度:3.5 mm
逻辑集成电路类型:MULTIPLEXER湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:RECTANGULAR
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
传播延迟(tpd):190 ns筛选级别:AEC-Q100
座面最大高度:1 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:2.5 mm

74HC157BQ-Q100 数据手册

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74HC157-Q100; 74HCT157-Q100  
Quad 2-input multiplexer  
Rev. 2 — 21 January 2015  
Product data sheet  
1. General description  
The 74HC157-Q100; 74HCT157-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC/HCT157-Q100 are quad 2-input multiplexers which select 4 bits of data from  
two sources under the control of a common data select input (S). The enable input (E) is  
active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of  
all other input conditions.  
Moving the data from two groups of registers to four common output buses is a common  
use of the 74HC/HCT157-Q100. The state of the common data select input (S)  
determines the particular register from which the data comes. It can also be used as  
function generator. The device is useful for implementing highly irregular logic by  
generating any four of the 16 different functions of two variables with one variable  
common. The 74HC/HCT157-Q100 is logic implementation of a 4-pole, 2-position switch,  
where the position of the switch is determined by the logic levels applied to S.  
The logic equations are:  
1Y = E (1I1 S + 1I0 S)  
2Y = E (2I1 S + 2I0 S)  
3Y = E (3I1 S + 3I0 S)  
4Y = E (4I1 S + 4I0 S)  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Low-power dissipation  
Non-inverting data path  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  

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