74HC04
Hex Inverter
High−Performance Silicon−Gate CMOS
The 74HC04 is identical in pinout to the LS04 and the MC14069.
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
The device consists of six three−stage inverters.
http://onsemi.com
MARKING
Features
DIAGRAMS
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
14
SOIC−14
D SUFFIX
CASE 751A
HC04G
AWLYWW
• Low Input Current: 1.0 mA
14
14
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 36 FETs or 9 Equivalent Gates
• These are Pb−Free Devices
1
1
14
TSSOP−14
DT SUFFIX
CASE 948G
HC
04
LOGIC DIAGRAM
ALYW G
1
G
1
3
5
2
4
6
1
A1
A2
A3
Y1
Y2
Y3
HC04
A
= Device Code
= Assembly Location
WL or L = Wafer Lot
= Year
WW or W = Work Week
Y
Y = A
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
9
8
10
12
A4
A5
A6
Y4
Y5
Y6
11
13
FUNCTION TABLE
Inputs
A
Outputs
Y
L
H
L
Pinout: 14−Lead Packages (Top View)
H
V
A6
Y6
A5
Y5
A4
Y4
CC
14
13
12
11
10
9
8
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3 GND
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
March, 2007 − Rev. 1
74HC04/D