Datasheet > 74HC00PW-Q100

74HC00PW-Q100

更新时间： 2024-11-03 11:12:39

品牌	Logo	应用领域
安世 - NEXPERIA		光电二极管逻辑集成电路
页数	文件大小	规格书
12页	235K
描述
Quad 2-input NAND gateProduction

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74HC00PW-Q100 数据手册

74HC00-Q100; 74HCT00-Q100

Quad 2-input NAND gate

Rev. 5 — 22 October 2021

Product data sheet

1. General description

The 74HC00-Q100; 74HCT00-Q100 is a quad 2-input NAND gate. Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess of V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 2.0 to 6.0 V

CMOS low power dissipation

High noise immunity

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Input levels:

•

For 74HC00-Q100: CMOS level

For 74HCT00-Q100: TTL level

•

Complies with JEDEC standards:

•

JESD8C (2.7 V to 3.6 V)

JESD7A (2.0 V to 6.0 V)

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)

•

Multiple package options

DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of

solder joints

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC00D-Q100

74HCT00D-Q100

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74HC00PW-Q100 -40 °C to +125 °C

74HCT00PW-Q100

TSSOP14

plastic thin shrink small outline package; 14 leads; SOT402-1

body width 4.4 mm

74HC00BQ-Q100

74HCT00BQ-Q100

-40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal

enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 × 3 × 0.85 mm

SOT762-1

12 3 4 5 6 7...12

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