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74FST3253DR2 PDF预览

74FST3253DR2

更新时间: 2024-11-04 22:14:03
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器开关逻辑集成电路光电二极管
页数 文件大小 规格书
8页 89K
描述
Dual 4:1 Multiplexer/ Demultiplexer Bus Switch

74FST3253DR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.25
系列:CBT/FST/QS/5C/BJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:9.9 mm
逻辑集成电路类型:MULTIPLEXER AND DEMUX/DECODER湿度敏感等级:1
功能数量:2输入次数:1
输出次数:4端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):0.25 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Other Logic ICs最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm

74FST3253DR2 数据手册

 浏览型号74FST3253DR2的Datasheet PDF文件第2页浏览型号74FST3253DR2的Datasheet PDF文件第3页浏览型号74FST3253DR2的Datasheet PDF文件第4页浏览型号74FST3253DR2的Datasheet PDF文件第5页浏览型号74FST3253DR2的Datasheet PDF文件第6页浏览型号74FST3253DR2的Datasheet PDF文件第7页 
74FST3253  
Dual 4:1 Multiplexer/  
Demultiplexer Bus Switch  
The ON Semiconductor 74FST3253 is a dual 4:1, high performance  
multiplexer/demultiplexer bus switch. The device is CMOS TTL  
compatible when operating between 4 and 5.5 Volts. The device  
http://onsemi.com  
MARKING  
exhibits extremely low R and adds nearly zero propagation delay.  
ON  
The device adds no noise or ground bounce to the system.  
DIAGRAMS  
Features  
R t 4 W Typical  
Less Than 0.25 ns−Max Delay Through Switch  
Nearly Zero Standby Current  
ON  
16  
16  
FST3253  
1
AWLYWW  
No Circuit Bounce  
SOIC−16  
D SUFFIX  
CASE 751B  
Control Inputs are TTL/CMOS Compatible  
Pin−For−Pin Compatible With QS3253, FST3253, CBT3253  
All Popular Packages: QSOP−16, TSSOP−16, SOIC−16  
All Devices in Package TSSOP are Inherently Pb−Free*  
1
16  
16  
FST  
3253  
ALYW  
1
TSSOP−16  
DT SUFFIX  
CASE 948F  
OE  
S1  
1B  
1B  
1B  
1B  
1A  
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
OE  
S
0
2B  
1
1
CC  
2
4
3
2
1
16  
4
16  
2B  
3
2B  
2B  
2A  
2
1
S3253  
ALYW  
1
QSOP−16  
QS SUFFIX  
CASE 492  
Figure 1. 16−Lead  
Pinout  
1
A
= Assembly Location  
= Year  
S
S
OE OE  
2
Function  
1
0
1
L, WL = Wafer Lot  
Y
W, WW = Work Week  
Disconnect 1A  
Disconnect 2A  
X
X
L
L
H
H
X
X
L
H
L
H
H
X
L
L
L
L
X
H
L
L
L
L
A = B  
1
A = B  
2
PIN NAMES  
A = B  
3
A = B  
Pin  
Description  
4
OE , OE  
Bus Switch Enables  
1
2
Figure 2. Truth Table  
S , S  
Select Inputs  
Bus A  
0
1
A
B , B , B , B  
4
Bus B  
1
2
3
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 2  
74FST3253/D  

74FST3253DR2 替代型号

型号 品牌 替代类型 描述 数据表
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