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74FCT166244CTPA PDF预览

74FCT166244CTPA

更新时间: 2024-10-28 14:48:15
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 66K
描述
Bus Driver, FCT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, TSSOP-48

74FCT166244CTPA 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete包装说明:SOP, TSSOP48,.3,20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
控制类型:ENABLE LOW系列:FCT
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A湿度敏感等级:1
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:4.1 ns
传播延迟(tpd):4.1 ns认证状态:Not Qualified
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:6
Base Number Matches:1

74FCT166244CTPA 数据手册

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IDT74FCT166244AT/CT  
FAST CMOS 16-BIT  
BUFFER/LINE DRIVER  
DESCRIPTION:  
FEATURES:  
The FCT166244T 16-Bit Buffer/Line Driver is for bus interface or signal  
bufferingapplicationsrequiringhighspeedandlowpowerdissipation. These  
deviceshaveaflowthroughpinorganization,andshrinkpackagingtosimplify  
board layout. All inputs are designed with hysteresis for improved noise  
margin. Thethree-statecontrolsallowindependent4-bit,8-bitorcombined16-  
bit operation. These parts are plug in replacements for ABT16244 where  
higher speed, lower noise or lower power dissipation levels are desired.  
The FCT166244T is suited for very low noise, point-to-point driving  
where there is a single receiver, or a very light lumped load (<100pF). The  
buffersaredesignedtolimittheoutputcurrenttolevelswhichwillavoidnoise  
and ringing on the signal lines without using external series terminating  
resistors.  
• 0.5 MICRON CMOS Technology  
• High-speed, low-power CMOS replacement for ABT functions  
• Typical tSK(o) (Output Skew) < 250ps  
• Low input and output leakage 1µA (max.)  
• Light drive balanced output of ±8mA  
• Minimal system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.25V at VCC = 5V,  
TA = 25°C  
• Power off disable outputs permit “live insertion”  
• Available in SSOP and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
1OE  
3OE  
1Y1  
1A1  
1A2  
3A1  
3A2  
3Y1  
3Y2  
1Y2  
1Y3  
3A3  
3A4  
1A3  
1A4  
3Y3  
3Y4  
1Y4  
2OE  
4OE  
2Y1  
4A1  
4A2  
4A3  
2A1  
2A2  
4Y1  
4Y2  
2Y2  
2Y3  
2Y4  
2A3  
2A4  
4Y3  
4Y4  
4A4  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2002  
1
2002 Integrated Device Technology, Inc.  
DSC-5462/2  

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