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74FCT16543ETPVG PDF预览

74FCT16543ETPVG

更新时间: 2024-11-26 20:47:23
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 90K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, GREEN, SSOP-56

74FCT16543ETPVG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:unknown
风险等级:5.52其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:18.415 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.064 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:3.4 ns传播延迟(tpd):3.7 ns
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:7.493 mm
Base Number Matches:1

74FCT16543ETPVG 数据手册

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FAST CMOS  
16-BIT LATCHED  
TRANSCEIVER  
IDT74FCT16543AT/CT/ET  
DESCRIPTION:  
FEATURES:  
The FCT16543T16-bitlatchedtransceivers are builtusingadvanced  
• 0.5 MICRON CMOS Technology  
dualmetalCMOStechnology.These high-speed,low-powerdevices are  
organized as two independent 8-bit D-type latched transceivers with  
separateinputandoutputcontroltopermitindependentcontrolofdataflow  
ineitherdirection.Forexample,the A-to-BEnable (xCEAB)mustbe low  
inordertoenterdatafromtheAportortooutputdatafromtheBport. xLEAB  
controlsthelatchfunction.WhenxLEABislow,thelatchesaretransparent.  
Asubsequentlow-to-hightransitionofxLEAB signalputs the Alatches in  
the storage mode.xOEAB performs outputenable functiononthe Bport.  
Data flowfromthe Bporttothe Aportis similarbutrequires usingxCEBA,  
xLEBA, and xOEBA inputs. Flow-through organization of signal pins  
simplifieslayout.Allinputsaredesignedwithhysteresisforimprovednoise  
margin.  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
VCC = 5V ±10%  
High drive outputs (–32mA IOH, 64mA IOL)  
• Power off disable outputs permit “live insertion”  
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,  
TA = 25°C  
Available in SSOP, TSSOP, and TVSOP packages  
The FCT16543T is ideally suited for driving high-capacitance loads  
and low-impedance backplanes. The output buffers are designed with  
poweroffdisable capabilitytoallow"live insertion"ofboards whenused  
as backplane drivers.  
FUNCTIONALBLOCKDIAGRAM  
56  
29  
2OEBA  
1OEBA  
31  
54  
2CEBA  
1CEBA  
30  
28  
55  
1
2
LEBA  
1
LEBA  
2OEAB  
1OEAB  
26  
27  
3
2
2
CEAB  
1
CEAB  
2
LEAB  
1
LEAB  
C
D
C
D
15  
5
2A1  
1A1  
42  
52  
2B1  
1B1  
C
D
C
D
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
SEPTEMBER 2009  
1
© 2009 Integrated Device Technology, Inc.  
DSC-5444/5  

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