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74F379_00 PDF预览

74F379_00

更新时间: 2024-11-01 04:01:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
7页 78K
描述
Quad Parallel Register with Enable

74F379_00 数据手册

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May 1988  
Revised October 2000  
74F379  
Quad Parallel Register with Enable  
General Description  
The 74F379 is a 4-bit register with buffered common  
Enable. This device is similar to the 74F175 but features  
the common Enable rather than common Master Reset.  
Features  
Edge triggered D-type inputs  
Buffered positive edge-triggered clock  
Buffered common enable input  
True and complement outputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74F379SC  
74F379SJ  
74F379PC  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 2000 Fairchild Semiconductor Corporation  
DS009527  
www.fairchildsemi.com  

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