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74F323SPCQR PDF预览

74F323SPCQR

更新时间: 2024-11-11 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 存储
页数 文件大小 规格书
6页 65K
描述
暂无描述

74F323SPCQR 数据手册

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April 1988  
Revised August 1999  
74F323  
Octal Universal Shift/Storage Register  
with Synchronous Reset and Common I/O Pins  
General Description  
Features  
Common parallel I/O for reduced pin count  
The 74F323 is an 8-bit universal shift/storage register with  
3-STATE outputs. Its function is similar to the 74F299 with  
the exception of Synchronous Reset. Parallel load inputs  
and flip-flop outputs are multiplexed to minimize pin count.  
Separate serial inputs and outputs are provided for Q0 and  
Additional serial inputs and outputs for expansion  
Four operating modes: shift left, shift right, load and  
store  
3-STATE outputs for bus-oriented applications  
Q7 to allow easy cascading. Four operation modes are  
possible: hold (store), shift left, shift right and parallel load.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F323SC  
74F323PC  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009517  
www.fairchildsemi.com  

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