Datasheet > 74F323

74F323

更新时间： 2024-11-25 22:37:03

品牌	Logo	应用领域
恩智浦 - NXP		存储
页数	文件大小	规格书
7页	75K
描述
8-bit universal shift/storage register with synchronous reset and common I/O pins 3-State

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中文翻译

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数据手册

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74F323 数据手册

Philips Semiconductors

Product specification

8-bit universal shift/storage register with synchronous

reset and common I/O pins (3-State)

74F323

FEATURES

PIN CONFIGURATION

• Common parallel I/O for reduced pin count

OE0

OE1

I/O6

I/O4

• Additional serial inputs and outputs for expansion

• Four operating modes: Shift left, shift right, load, and store

• 3-State outputs for bus-oriented applications

19 S1

18 DS7

17 Q7

16 I/O7

DESCRIPTION

The 74F323 is an 8-bit universal shift/storage register with 3-State

outputs. Its function is similar to the 74F299 with the exception of

synchronous Reset. Parallel load inputs and flip-flop outputs are

multiplexed to minimize pin counts. Separate serial inputs and

outputs are provided for flip-flops Q0 and Q7 to allow easy serial

cascading. Four modes of operation are possible: Hold (store), shift

left, shift right, and parallel load.

I/O2

I/O0

15 I/O5

14 I/O3

13 I/O1

12 CP

GND 10

11 DS0

SF00888

The 74F323 contains eight edge-triggered D-type flip-flops and the

interstage logic necessary to perform synchronous reset, shift left,

shift right, parallel load, and hold operations. The type of operation is

determined by S0 and S1, as shown in the Function Table. All

flip-flop outputs are brought out through 3-State buffers to separate

I/O pins that also serve as data inputs in the parallel load mode.

Q0 and Q7 are also brought out on other pins for expansion in serial

shifting of longer words.

TYPICAL

SUPPLY CURRENT

(TOTAL)

TYPE

TYPICAL f

MAX

74F323

115MHz

55mA

ORDERING INFORMATION

A Low signal on SR overrides the Select and inputs and allows the

flip-flops to be reset by the next rising edge of clock. All other state

changes are initiated by the rising edge of the clock. Inputs can

change when the clock is in either state provided only that the

recommended setup and hold times, relative to the rising edge of

clock are observed.

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

= 5V ±10%, T = 0°C to +70°C

amb

20-pin plastic DIP

20-pin plastic SOL

N74F323N

N74F323D

A High signal on either OE0 or OE1 disables the 3-State buffers and

puts the I/O pins in the high impedance state. In this condition the

shift, hold, load and reset operations can still occur. The 3-State

buffers are also disabled by High signals on both S0 and S1 in

preparation for a parallel load operation.

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

74F(U.L.)

LOAD VALUE

HIGH/LOW

PINS

DESCRIPTION

HIGH/LOW

1.0/1.0

1.0/2.0

1.0/1.0

50/33

DS0

Serial data input for right shift

Serial data input for left shift

Mode select inputs

20µA/0.6mA

20µA/1.2mA

20µA/0.6mA

20µA/20mA

70µA/0.6mA

3.0mA/24mA

DS7

S0, S1

Clock pulse input (Active rising edge)

Synchronous Reset input (Active Low)

OE0, OE1 Output Enable input (Active Low)

Q0, Q7

Serial outputs

Multiplexed parallel data inputs or

3-State parallel outputs

3.5/1.0

150/40

I/On

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High State and 0.6mA in the Low state.

1990 Mar 01

853-0367 98987

12 3 4 5 6 7

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与74F323相关器件

型号	品牌	获取价格	描述	数据表
74F323DCQM	FAIRCHILD	获取价格	Shift Register, 8-Bit, TTL, CDIP20,
74F323FC	TI	获取价格	F/FAST SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, C
74F323LC	TI	获取价格	F/FAST SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, C
74F323PC	FAIRCHILD	获取价格	Octal Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins
74F323PCQM	ROCHESTER	获取价格	Parallel In Parallel Out
74F323PCQR	ROCHESTER	获取价格	Parallel In Parallel Out, F/FAST Series, 8-Bit, Bidirectional, True Output, TTL, PDIP20, P
74F323PCQR	FAIRCHILD	获取价格	Parallel In Parallel Out, F/FAST Series, 8-Bit, Bidirectional, True Output, TTL, PDIP20, P
74F323QC	FAIRCHILD	获取价格	Parallel In Parallel Out, F/FAST Series, 8-Bit, Bidirectional, True Output, TTL, PQCC20, P
74F323QCQR	FAIRCHILD	获取价格	Parallel In Parallel Out, F/FAST Series, 8-Bit, Bidirectional, True Output, TTL, PQCC20, P
74F323SC	FAIRCHILD	获取价格	Octal Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins

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