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74AUP1T08GW PDF预览

74AUP1T08GW

更新时间: 2022-02-26 12:27:22
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安世 - NEXPERIA /
页数 文件大小 规格书
15页 202K
描述
Low-power 2-input AND gate with voltage-level translator

74AUP1T08GW 数据手册

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Nexperia  
74AUP1T08  
Low-power 2-input AND gate with voltage-level translator  
6.2 Pin description  
Table 3.ꢀPin description  
Symbol  
Pin  
1
Description  
data input  
B
A
2
data input  
GND  
Y
3
ground (0 V)  
data output  
supply voltage  
4
VCC  
5
7 Functional description  
Table 4.ꢀFunction table [1]  
Input  
Output  
A
L
B
L
Y
L
L
L
H
L
H
L
H
H
H
[1] H = HIGH voltage level;  
L = LOW voltage level.  
8 Limiting values  
Table 5.ꢀLimiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-50  
-0.5  
-50  
-0.5  
-
Max  
+4.6  
-
Unit  
V
VCC  
IIK  
supply voltage  
input clamping current  
input voltage  
VI < 0 V  
mA  
V
[1]  
[1]  
VI  
+4.6  
-
IOK  
VO  
IO  
output clamping current  
output voltage  
VO < 0 V  
mA  
V
Active mode and Power-down mode  
VO = 0 V to VCC  
+4.6  
±20  
50  
output current  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-50  
-65  
-
-
storage temperature  
total power dissipation  
+150  
250  
[2]  
Tamb = -40 °C to +125 °C  
mW  
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.  
For X2SON5 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.  
74AUP1T08  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 23 November 2017  
3 / 15  
 
 
 
 
 

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