Datasheet > 74AUP1T08GW

74AUP1T08GW

更新时间： 2022-02-26 12:27:22

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
15页	202K
描述
Low-power 2-input AND gate with voltage-level translator

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74AUP1T08GW 数据手册

Nexperia

74AUP1T08

Low-power 2-input AND gate with voltage-level translator

Contents

General description ............................................ 1

Features and benefits .........................................1

6.1

6.2

11.1

Ordering information .......................................... 2

Marking .................................................................2

Functional diagram .............................................2

Pinning information ............................................ 2

Pinning ...............................................................2

Pin description ...................................................3

Functional description ........................................3

Limiting values ....................................................3

Recommended operating conditions ................4

Static characteristics ..........................................4

Dynamic characteristics .....................................7

Waveforms and test circuit ................................9

Package outline .................................................10

Abbreviations .................................................... 12

Revision history ................................................ 12

Legal information ..............................................13

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 23 November 2017

Document identifier: 74AUP1T08

1...12 13 1415

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