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74AUP1G07SE-7 PDF预览

74AUP1G07SE-7

更新时间: 2024-02-06 21:05:00
品牌 Logo 应用领域
美台 - DIODES 驱动器输出元件
页数 文件大小 规格书
11页 212K
描述
SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT

74AUP1G07SE-7 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT-353
包装说明:TSSOP,针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:23 weeks风险等级:1.57
系列:AUP/ULP/VJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:2.15 mm
逻辑集成电路类型:BUFFER湿度敏感等级:1
功能数量:1输入次数:1
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):20.7 ns
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:1.3 mmBase Number Matches:1

74AUP1G07SE-7 数据手册

 浏览型号74AUP1G07SE-7的Datasheet PDF文件第4页浏览型号74AUP1G07SE-7的Datasheet PDF文件第5页浏览型号74AUP1G07SE-7的Datasheet PDF文件第6页浏览型号74AUP1G07SE-7的Datasheet PDF文件第8页浏览型号74AUP1G07SE-7的Datasheet PDF文件第9页浏览型号74AUP1G07SE-7的Datasheet PDF文件第10页 
74AUP1G07  
Operating and Package Characteristics (@TA = +25°C, unless otherwise specified.)  
Test  
Conditions  
Parameter  
Typ  
Unit  
VCC  
0.8V  
2.6  
2.8  
2.9  
3.1  
3.6  
4.2  
1.5  
371  
1.2V ± 0.1V  
1.5V ± 0.1V  
1.8V ± 0.15V  
2.5V ± 0.2V  
3.3V ± 0.3V  
0V or 3.3V  
Power Dissipation  
Capacitance  
f = 1MHz  
No Load  
pF  
Cpd  
Input Capacitance  
pF  
Ci  
Vi = VCC or GND  
SOT353  
Thermal Resistance  
Junction-to-Ambient  
430  
445  
X2-DFN1410-6  
(Note 6)  
(Note 6  
°C/W  
θJA  
X2-DFN1010-6  
SOT353  
143  
190  
250  
Thermal Resistance  
Junction-to-Case  
X2-DFN1410-6  
X2-DFN1010-6  
°C/W  
θJC  
Notes:  
6. Test condition for SOT353, X2-DFN1410-6, and X2-DFN1010-6 devices mounted on FR-4 substrate PC board, 2oz copper, with minimum  
recommended pad layout.  
Parameter Measurement Information  
TEST  
S1  
RL  
5KΩ  
tPLZ/tPZL  
VLOAD  
Inputs  
V  
VCC  
VM  
VLOAD  
CL  
VI  
tr/tf  
0.8V  
3ns  
3ns  
3ns  
3ns  
3ns  
3ns  
5, 10, 15, 30pF  
5, 10, 15, 30pF  
5, 10, 15, 30pF  
5, 10, 15, 30pF  
5, 10, 15, 30pF  
5, 10, 15, 30pF  
0.1V  
0.1V  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
2 X VCC  
2 X VCC  
2 X VCC  
2 X VCC  
2 X VCC  
2 X VCC  
1.2V±0.1V  
1.5V±0.1V  
1.8V±0.15V  
2.5V±0.2V  
3.3V±0.3 V  
0.1V  
0.15V  
0.15V  
0.3V  
Voltage Waveform Pulse Duration  
Voltage Waveform Enable and Disable Times  
Low and High Level Enabling  
Figure 1. Load Circuit and Voltage Waveforms  
A. Includes test lead and test apparatus capacitance.  
Notes:  
B. All pulses are supplied at pulse repetition rate 10 MHz.  
C. Inputs are measured separately one transition per measurement.  
D. For the open drain device the specified propagation delay tPD is the same as tPLZ and tPZL.  
7 of 11  
www.diodes.com  
August 2012  
© Diodes Incorporated  
74AUP1G07  
Document number: DS35149 Rev. 1 - 2  

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