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74ALVT16899DGG PDF预览

74ALVT16899DGG

更新时间: 2024-11-03 22:25:39
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
20页 126K
描述
2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State

74ALVT16899DGG 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:unknown风险等级:5.76
Is Samacsys:N其他特性:PARITY GENERATION/DETECTION IN BOTH DIRECTIONS; USER SELECTABLE 3.3V VCC
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ALVTJESD-30 代码:R-PDSO-G56
长度:14 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:2.5/3.3 VProp。Delay @ Nom-Sup:3.9 ns
传播延迟(tpd):4.6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL翻译:N/A
宽度:6.1 mmBase Number Matches:1

74ALVT16899DGG 数据手册

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INTEGRATED CIRCUITS  
74ALVT16899  
2.5V/3.3V 18-bit latched transceiver with  
16-bit parity generator/checker (3-State)  
Product specification  
IC23 Data Handbook  
1998 Jun 30  
Philips  
Semiconductors  

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