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74AHCT164D14 PDF预览

74AHCT164D14

更新时间： 2024-11-18 14:47:03
品牌 Logo 应用领域
美台 - DIODES 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 513K
描述
Serial In Parallel Out, AHCT/VHCT/VT Series, 8-Bit, Right Direction, True Output, CMOS, PDIP14, GREEN, PLASTIC, DIP-14

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74AHCT164D14 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：DIP,Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：12 weeks
风险等级：2.15计数方向：RIGHT
系列：AHCT/VHCT/VTJESD-30 代码：R-PDIP-T14
JESD-609代码：e3长度：19 mm
逻辑集成电路类型：SERIAL IN PARALLEL OUT位数：8
功能数量：1端子数量：14
最高工作温度：125 °C最低工作温度：-40 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：14 ns座面最大高度：4.31 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：7.62 mm最小 fmax：85 MHz
Base Number Matches：1

74AHCT164D14 数据手册

 浏览型号74AHCT164D14的Datasheet PDF文件第2页浏览型号74AHCT164D14的Datasheet PDF文件第3页浏览型号74AHCT164D14的Datasheet PDF文件第4页浏览型号74AHCT164D14的Datasheet PDF文件第5页浏览型号74AHCT164D14的Datasheet PDF文件第6页浏览型号74AHCT164D14的Datasheet PDF文件第7页 
74AHCT164  
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS  
Pin Assignments  
Description  
The 74AHCT164 is a serial input 8-bit edge-triggered shift register  
that has outputs from each of eight stages. The device features TTL  
compatible inputs.  
(Top View  
)
SERIAL DATA INPUT PINS  
14  
1
2
3
Vcc  
Q7  
Q6  
Q5  
DSA  
DSB  
Q0  
The serial input data is entered at pin SDA or pin SDB as these are  
logically ANDED. Either input could be used as an active HIGH  
enable with data entry on the other pin. If a single input is desired,  
the pins can be tied together or the unused input can be tied HIGH.  
13  
12  
11  
10  
4
5
6
7
DATA ENTRY  
Q1  
Data is shifted into Q0 from the serial input pins on each LOW to  
HIGH transition of the CP pin. Also during the CP edge the data is  
transferred from each Qn to Qn+1. The serial data on pins DSA and  
DSB must be stable before and after the CP rising edge to meet the  
set-up and hold timing requirements.  
Q2  
Q4  
9
8
MR  
Q3  
GND  
CP  
RESET  
SO-14 / TSSOP-14 / PDIP-14  
When asserted LOW the Master Reset (MR ) pin sets all Qn to LOW.  
This action does not depend on the condition of serial input or clock  
pins. The MR must be asserted HIGH for a recovery time before the  
next CP positive edge pulse.  
Features  
Applications  
Supply Voltage Range from 4.5V to 5.5V  
Sinks or Sources 8mA at VCC = 4.5V  
TTL Compatible Inputs  
General Purpose Logic  
Wide Array of Products Such as:  
.
PCs, Networking, Notebooks, Netbooks  
Computer Peripherals, Hard Drives, CD/DVD ROMs  
TVs, DVDs, DVRs, Set-Top Boxes  
CMOS Low Power Consumption  
Schmitt Trigger Action at All Inputs  
ESD Protection Exceeds JESD 22  
.
.
.
.
.
200-V Machine Model (A115)  
2000-V Human Body Model (A114)  
1000-V Charged Device Model (C101)  
Range of Package Options SO-14 and TSSOP-14  
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"  
and Lead-free.  
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and  
<1000ppm antimony compounds.  
Device ordering information is on page 7  
1 of 10  
www.diodes.com  
August 2015  
© Diodes Incorporated  
74AHCT164  
Document number: DS36282 Rev. 2 - 2  
1234567...10

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