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74AHC30BQ PDF预览

74AHC30BQ

更新时间: 2024-11-16 12:19:59
品牌 Logo 应用领域
恩智浦 - NXP 逻辑集成电路
页数 文件大小 规格书
14页 94K
描述
8-input NAND gate

74AHC30BQ 数据手册

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74AHC30; 74AHCT30  
8-input NAND gate  
Rev. 03 — 26 June 2009  
Product data sheet  
1. General description  
The 74AHC30; 74AHCT30 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard  
No. 7-A.  
The 74AHC30; 74AHCT30 provides an 8-input NAND function.  
2. Features  
I Balanced propagation delays  
I All inputs have Schmitt-trigger actions  
I Inputs accept voltages higher than VCC  
I Input levels:  
N For 74AHC30: CMOS level  
N For 74AHCT30: TTL level  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AHC30D  
40 °C to +125 °C  
40 °C to +125 °C  
40 °C to +125 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74AHCT30D  
74AHC30PW  
74AHCT30PW  
74AHC30BQ  
74AHCT30BQ  
TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
SOT402-1  
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1  
thin quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  

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