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74AHC30PW-Q100J PDF预览

74AHC30PW-Q100J

更新时间: 2024-11-16 19:55:39
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
15页 124K
描述
74AHC(T)30-Q100 - 8-input NAND gate TSSOP 14-Pin

74AHC30PW-Q100J 技术参数

生命周期:Transferred零件包装代码:TSSOP
包装说明:4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14针数:14
Reach Compliance Code:unknown风险等级:5.78
Base Number Matches:1

74AHC30PW-Q100J 数据手册

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74AHC30-Q100; 74AHCT30-Q100  
8-input NAND gate  
Rev. 1 — 20 November 2013  
Product data sheet  
1. General description  
The 74AHC30-Q100; 74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with  
JEDEC standard No. 7-A.  
The 74AHC30-Q100; 74AHCT30-Q100 provides an 8-input NAND function.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have Schmitt-trigger actions  
Inputs accept voltages higher than VCC  
Input levels:  
For 74AHC30-Q100: CMOS level  
For 74AHCT30-Q100: TTL level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AHC30D-Q100  
74AHCT30D-Q100  
40 C to +125 C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74AHC30PW-Q100 40 C to +125 C  
TSSOP14  
plastic thin shrink small outline package;  
14 leads; body width 4.4 mm  
SOT402-1  
74AHCT30PW-Q100  
74AHC30BQ-Q100  
74AHCT30BQ-Q100  
40 C to +125 C  
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1  
very thin quad flat package; no leads;  
14 terminals; body 2.5 3 0.85 mm  
 
 

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