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74ACTQ841SCX PDF预览

74ACTQ841SCX

更新时间: 2024-11-02 20:26:55
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
10页 184K
描述
ACT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, SOIC-24

74ACTQ841SCX 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:SOP, SOP24,.4Reach Compliance Code:unknown
风险等级:5.78Is Samacsys:N
其他特性:MAX VOLP = 1.5V AT VCC = 5V, TA = 25 DEGREE C; MAX OUTPUT SKEW = 1000PS系列:ACT
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:15.4 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:5 V传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

74ACTQ841SCX 数据手册

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March 1993  
54ACTQ/74ACTQ841 Quiet Series 10-Bit Transparent  
Latch with TRI-STATE Outputs  
É
General Description  
Features  
Y
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
The ’ACTQ841 bus interface latch is designed to eliminate  
the extra packages required to buffer existing latches and  
provide extra data width for wider address/data paths or  
buses carrying parity. The ’841 is a 10-bit transparent latch,  
a 10-bit version of the ’373. The ’ACTQ841 utilizes NSC  
Quiet Series technology to guarantee quiet output switching  
and improved dynamic threshold performance, FACT Quiet  
SeriesTM features GTOTM output control and undershoot  
corrector in addition to a split ground bus for superior per-  
formance.  
Y
Y
Guaranteed pin-to-pin skew AC performance  
Inputs and outputs on opposite sides of package allow  
easy interface with microprocessors  
Improved latch-up immunity  
Y
Y
Y
Y
Outputs source/sink 24 mA  
’ACTQ841 has TTL-compatible inputs  
Standard Military Drawing (SMD)  
Ð ’ACTQ841: 5962-92200  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP, Flatpak and SOIC  
TL/F/10688–1  
TL/F/10688–2  
TL/F/10688–3  
Pin Names  
D D  
Description  
Data Inputs  
Pin Assignment  
for LCC  
0
9
O O  
0
TRI-STATE Outputs  
Output Enable  
9
OE  
LE  
Latch Enable  
TL/F/10688–4  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10688  
RRD-B30M75/Printed in U. S. A.  

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