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74ACTQ827FCQR PDF预览

74ACTQ827FCQR

更新时间: 2024-11-02 20:03:19
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
10页 176K
描述
ACT SERIES, 10-BIT DRIVER, TRUE OUTPUT, CDFP24, CERAMIC, FP-24

74ACTQ827FCQR 技术参数

生命周期:Obsolete包装说明:DFP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.71其他特性:WITH DUAL OUTPUT ENABLE
系列:ACTJESD-30 代码:R-GDFP-F24
长度:15.4305 mm逻辑集成电路类型:BUS DRIVER
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):9 ns认证状态:Not Qualified
座面最大高度:2.286 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

74ACTQ827FCQR 数据手册

 浏览型号74ACTQ827FCQR的Datasheet PDF文件第2页浏览型号74ACTQ827FCQR的Datasheet PDF文件第3页浏览型号74ACTQ827FCQR的Datasheet PDF文件第4页浏览型号74ACTQ827FCQR的Datasheet PDF文件第5页浏览型号74ACTQ827FCQR的Datasheet PDF文件第6页浏览型号74ACTQ827FCQR的Datasheet PDF文件第7页 
March 1993  
54ACTQ/74ACTQ827 Quiet Series  
10-Bit Buffer/Line Driver with TRI-STATE Outputs  
É
General Description  
Features  
Y
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
The ’ACTQ827 10-bit bus buffer provides high performance  
bus interface buffering for wide data/address paths or bus-  
es carrying parity. The 10-bit buffers have NOR output en-  
ables for maximum control flexibility. The ’ACTQ827 utilizes  
NSC Quiet Series technology to guarantee quiet output  
switching and improved dynamic threshold performance.  
FACT Quiet SeriesTM feature GTOTM output control and un-  
dershoot corrector in addition to a split ground bus for supe-  
rior performance.  
Y
Guaranteed pin-to-pin skew AC performance  
Y
Inputs and outputs on opposite sides of package allow  
easy interface with microprocessors  
Y
Improved latch-up immunity  
Y
Outputs source/sink 24 mA  
Y
Functionally and pin-compatible to AMD’s AM29827  
Y
’ACTQ827 has TTL-compatible inputs  
Y
4 kV minimum ESD immunity  
Y
Standard Military Drawing (SMD)  
Ð ’ACTQ827: 5962-92199  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP, Flatpak and SOIC  
TL/F/10687–1  
IEEE/IEC  
TL/F/10687–3  
Pin Assignment  
for LCC  
TL/F/10687–2  
Pin Names  
OE , OE  
Description  
Output Enable  
Data Inputs  
1
2
D D  
0
9
O O  
0
Data Outputs  
9
TL/F/10687–4  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10687  
RRD-B30M75/Printed in U. S. A.  

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