74ACT18825MTDX

更新时间： 2024-01-24 12:55:03

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		驱动器
页数	文件大小	规格书
6页	51K
描述
9-Bit Buffer/Driver

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数据手册

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74ACT18825MTDX 数据手册

August 1999

Revised October 1999

74ACT18825

18-Bit Buffer/Line Driver with 3-STATE Outputs

General Description

Features

The ACT18825 contains eighteen non-inverting buffers

with 3-STATE outputs designed to be employed as a mem-

ory and address driver, clock driver, or bus oriented trans-

mitter/receiver. The device is byte controlled. Each byte

has separate 3-STATE control inputs which can be shorted

together for full 18-bit operation.

■ Broadside pinout allows for easy board layout

■ Separate control logic for each byte

■ Extra data width for wider address/data paths or buses

carrying parity

■ Outputs source/sink 24 mA

■ TTL-compatible inputs

Ordering Code:

Order Number

74ACT18825SSC

74ACT18825MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names

Description

OE_n

Output Enable Input (Active LOW)

I₀–I₁₇

O₀–O₁₇

Inputs

Outputs

FACT , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.

DS0500292

www.fairchildsemi.com

12 3 4 5 6

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与74ACT18825MTDX相关器件

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