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74ACT11014DWR PDF预览

74ACT11014DWR

更新时间: 2024-11-30 21:08:07
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
5页 79K
描述
ACT SERIES, HEX 1-INPUT INVERT GATE, PDSO20, PLASTIC, SOIC-20

74ACT11014DWR 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.83其他特性:CENTER PIN VCC AND GND
系列:ACTJESD-30 代码:R-PDSO-G20
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):9.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

74ACT11014DWR 数据手册

 浏览型号74ACT11014DWR的Datasheet PDF文件第2页浏览型号74ACT11014DWR的Datasheet PDF文件第3页浏览型号74ACT11014DWR的Datasheet PDF文件第4页浏览型号74ACT11014DWR的Datasheet PDF文件第5页 
ꢀ ꢁ ꢂꢃ ꢄꢅꢅꢆ ꢅꢁ  
ꢇꢈ ꢉ ꢊꢃ ꢇꢋꢌ ꢄꢄꢍꢄ ꢎꢌꢏ ꢏ ꢈꢎ ꢌꢐ ꢑꢈ ꢎ ꢄꢈ ꢎ  
SCAS142B − FEBRUARY 1991 − REVISED AUGUST 1995  
DW OR N PACKAGE  
(TOP VIEW)  
D Inputs Are TTL-Voltage Compatible  
D Flow-Through Architecture Optimizes  
PCB Layout  
1Y  
2Y  
1A  
2A  
3A  
NC  
V
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
D Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
3Y  
D EPIC (Enhanced-Performance Implanted  
GND  
GND  
GND  
GND  
4Y  
CMOS) 1-µm Process  
CC  
V
D 500-mA Typical Latch-Up Immunity  
at 125°C  
D Package Options Include Plastic  
Small-Outline (D) and Standard Plastic  
300-mil DIP (J) Packages  
CC  
NC  
13 4A  
12 5A  
5Y  
11  
6Y  
6A  
description  
The 74ACT11014 contains six independent inverters. The device performs the Boolean function Y = A. Because  
of the Schmitt action, the device has different input threshold levels for positive-going (V ) and negative-going  
T+  
(V ) signals.  
T−  
The 74ACT11014 is temperature compensated and can be triggered from the slowest of input ramps and still  
give clean, jitter-free output signals. It also has a greater noise margin than conventional inverters.  
The 74ACT11014 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic symbol  
logic diagram, each inverter (positive logic)  
20  
1A  
1
2
1Y  
2Y  
3Y  
4Y  
5Y  
6Y  
A
Y
19  
2A  
18  
3
3A  
13  
8
4A  
12  
9
5A  
11  
10  
6A  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢡ  
Copyright 1995, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
ꢜꢚ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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