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74ACT11020DR PDF预览

74ACT11020DR

更新时间: 2024-12-01 02:58:47
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 79K
描述
DUAL 4-INPUT POSITIVE-NAND GATES

74ACT11020DR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.79
其他特性:CENTER PIN VCC AND GND系列:ACT
JESD-30 代码:R-PDSO-G14长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A功能数量:2
输入次数:4端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIEDProp。Delay @ Nom-Sup:9.2 ns
传播延迟(tpd):9.2 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74ACT11020DR 数据手册

 浏览型号74ACT11020DR的Datasheet PDF文件第2页浏览型号74ACT11020DR的Datasheet PDF文件第3页浏览型号74ACT11020DR的Datasheet PDF文件第4页浏览型号74ACT11020DR的Datasheet PDF文件第5页 
ꢀ ꢁ ꢂꢃꢄ ꢅꢅ ꢆ ꢇ ꢆ ꢈꢉ ꢊ ꢁꢂ ꢃꢄ ꢅꢅꢆ ꢇꢆ  
ꢋꢌꢂ ꢍꢉꢁ ꢎꢏ ꢐꢑꢌ ꢄꢉ ꢑꢒ ꢓꢏ ꢄ ꢏꢔꢕ ꢎꢐꢂꢐ ꢋꢉ ꢖ ꢂꢄꢕ ꢓ  
SCAS016A − D2957, JUNE 1987 − REVISED APRIL 1993  
Inputs Are TTL-Voltage Compatible  
54ACT11020 . . . J PACKAGE  
74ACT11020 . . . D OR N PACKAGE  
Flow-Through Architecture to Optimize  
(TOP VIEW)  
PCB Layout  
Center-Pin V  
and GND Configurations to  
Minimize High-Speed Switching Noise  
CC  
1B  
1A  
NC  
1C  
1D  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
EPICt (Enhanced-Performance Implanted  
1Y  
CMOS) 1-mm Process  
GND  
2Y  
CC  
500-mA Typical Latch-Up Immunity  
at 125°C  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
2A  
2B  
NC  
2D  
2C  
8
54ACT11020 . . . FK PACKAGE  
(TOP VIEW)  
description  
These devices contain two independent 4-input  
NAND gates. They perform the Boolean functions  
Y = ASBSCSD or Y = A + B + C + D in positive logic.  
3
2
1
20 19  
18  
2B  
NC  
NC  
1B  
4
5
6
7
8
NC  
NC  
NC  
2C  
17  
16  
15  
14  
The 54ACT11020 is characterized for operation  
over the full military temperature range of − 55°C  
to 125°C. The 74ACT11020 is characterized for  
operation from − 40°C to 85°C.  
NC  
1A  
9 10 11 12 13  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
NC − No internal connection  
A
H
L
B
C
H
X
X
L
D
H
X
X
X
L
H
X
L
L
logic diagram (positive logic)  
H
H
H
H
X
X
X
1A  
X
X
1B  
1C  
1D  
1Y  
2Y  
X
logic symbol  
2A  
2B  
2C  
2D  
2
1A  
&
1
1B  
3
5
1Y  
2Y  
13  
1C  
12  
1D  
10  
2A  
9
2B  
7
2C  
6
2D  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  

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