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74ACQ245FCQR PDF预览

74ACQ245FCQR

更新时间: 2024-11-06 14:26:31
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路
页数 文件大小 规格书
10页 207K
描述
AC SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP20, CERPACK-20

74ACQ245FCQR 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.69Is Samacsys:N
其他特性:WITH DIRECTION CONTROL系列:AC
JESD-30 代码:R-GDFP-F20逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.286 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:6.731 mmBase Number Matches:1

74ACQ245FCQR 数据手册

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March 1993  
54ACQ/74ACQ245 54ACTQ/74ACTQ245  
#
Quiet Series Octal Bidirectional Transceiver  
with TRI-STATE Inputs/Outputs  
É
General Description  
Features  
Y
CC  
I
and I  
reduced by 50%  
OZ  
The ’ACQ/’ACTQ245 contains eight non-inverting bidirec-  
tional buffers with TRI-STATE outputs and is intended for  
bus-oriented applications. Current sinking capability is  
24 mA at both the A and B ports. The Transmit/Receive  
(T/R) input determines the direction of data flow through  
the bidirectional transceiver. Transmit (active-HIGH) en-  
ables data from A ports to B ports; Receive (active-LOW)  
enables data from B ports to A ports. The Output Enable  
input, when HIGH, disables both A and B ports by placing  
them in a HIGH Z condition.  
Y
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Y
Y
Y
Guaranteed pin-to-pin skew AC performance  
Improved latch-up immunity  
TRI-STATE outputs drive bus lines or buffer memory  
address registers  
Y
Y
Y
Y
Outputs source/sink 24 mA  
Faster prop delays than the standard ’ACT245  
4 kV minimum ESD immunity (‘ACQ)  
Standard Military Drawing (SMD)  
Ð ’ACTQ245: 5962-8766303  
The ’ACQ/’ACTQ utilizes NSC Quiet Series technology to  
guarantee quiet output switching and improve dynamic  
threshold performance. FACT Quiet SeriesTM features  
GTOTM output control and undershoot corrector in addition  
to a split ground bus for superior performance.  
Ð ’ACQ245: 5962-92177  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP, Flatpak, QSOP and SOIC  
IEEE/IEC  
TL/F/10236–1  
Pin  
Description  
Names  
OE  
Output Enable Input  
Transmit/Receive Input  
Side A TRI-STATE  
Inputs or TRI-STATE  
Outputs  
T/R  
A A  
0
7
7
TL/F/10236–3  
TL/F/10236–2  
B B  
0
Side B TRI-STATE  
Inputs or TRI-STATE  
Outputs  
Pin Assignment  
for LCC  
Truth Table  
Inputs  
Outputs  
OE  
T/R  
L
L
L
H
X
Bus B Data to Bus A  
Bus A Data to Bus B  
HIGH-Z State  
H
e
e
e
H
L
HIGH Voltage Level  
LOW Voltage Level  
Immaterial  
TL/F/10236–4  
X
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
FACTTM, FACT Quiet SeriesTM, and GTOTM are trademarks of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10236  
RRD-B30M75/Printed in U. S. A.  

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