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74AC521PC_NL

更新时间: 2024-11-09 20:02:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
9页 111K
描述
Identity Comparator, AC Series, 8-Bit, Inverted Output, CMOS, PDIP20, 0.300 INCH, PLASTIC, MS-001, DIP-20

74AC521PC_NL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, MS-001, DIP-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.21其他特性:CASCADABLE
系列:ACJESD-30 代码:R-PDIP-T20
JESD-609代码:e3长度:26.075 mm
逻辑集成电路类型:IDENTITY COMPARATOR位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:3.3/5 V
传播延迟(tpd):12.5 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Arithmetic Circuits
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

74AC521PC_NL 数据手册

 浏览型号74AC521PC_NL的Datasheet PDF文件第2页浏览型号74AC521PC_NL的Datasheet PDF文件第3页浏览型号74AC521PC_NL的Datasheet PDF文件第4页浏览型号74AC521PC_NL的Datasheet PDF文件第5页浏览型号74AC521PC_NL的Datasheet PDF文件第6页浏览型号74AC521PC_NL的Datasheet PDF文件第7页 
November 1988  
Revised March 2005  
74AC521 74ACT521  
8-Bit Identity Comparator  
General Description  
Features  
The AC/ACT521 is an expandable 8-bit comparator. It com-  
pares two words of up to eight bits each and provides a  
LOW output when the two words match bit for bit. The  
expansion input IA B also serves as an active LOW enable  
ICC reduced by 50%  
Compares two 8-bit words in 6.5 ns typ  
Expandable to any word length  
20-pin package  
input.  
Outputs source/sink 24 mA  
ACT521 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC521SC  
74AC521SJ  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
74AC521MTC  
74AC521PC  
74ACT521SC  
74ACT521SJ  
74ACT521MTC  
74ACT521PC  
M20B  
M20D  
MTC20  
N20A  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
Word A Inputs  
Word B Inputs  
A0A7  
B0B7  
TA  
Expansion or Enable Input  
Identity Output  
B
OA  
B
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS009964  
www.fairchildsemi.com  

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