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74AC175SCX_NL PDF预览

74AC175SCX_NL

更新时间: 2024-11-23 13:04:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
12页 313K
描述
D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS, PDSO16, 0.150 INCH, MS-012, SOIC-16

74AC175SCX_NL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.51
Is Samacsys:N系列:AC
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:139000000 Hz
最大I(ol):0.012 A湿度敏感等级:1
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3/5 V
传播延迟(tpd):14.5 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:244 MHz
Base Number Matches:1

74AC175SCX_NL 数据手册

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April 2007  
74AC175, 74ACT175  
tm  
Quad D-Type Flip-Flop  
Features  
General Description  
I reduced by 50%  
The AC/ACT175 is a high-speed quad D-type flip-flop.  
The device is useful for general flip-flop requirements  
where clock and clear inputs are common. The informa-  
tion on the D-type inputs is stored during the LOW-to-  
HIGH clock transition. Both true and complemented out-  
puts of each flip-flop are provided. A Master Reset input  
resets all flip-flops, independent of the Clock or D-type  
inputs, when LOW.  
CC  
Edge-triggered D-type inputs  
Buffered positive edge-triggered clock  
Asynchronous common reset  
True and complement output  
Outputs source/sink 24mA  
ACT175 has TTL-compatible inputs  
Ordering Information  
Order  
Number  
Package  
Number  
Package Description  
74AC175SC  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Body  
74AC175SJ  
74AC175MTC  
74AC175PC  
74ACT175SC  
M16D  
MTC16  
N16E  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Body  
74ACT175SJ  
M16D  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74ACT175MTC  
MTC16  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
D –D  
Data Inputs  
0
3
CP  
Clock Pulse Input  
Master Reset Input  
True Outputs  
MR  
Q –Q  
0
3
Q –Q  
Complement Outputs  
0
3
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©1988 Fairchild Semiconductor Corporation  
74AC175, 74ACT175 Rev. 1.4  
www.fairchildsemi.com  

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