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74AC191FCX PDF预览

74AC191FCX

更新时间: 2024-11-23 12:59:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器时钟
页数 文件大小 规格书
10页 117K
描述
Binary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, CDFP16, CERPACK-16

74AC191FCX 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.13Is Samacsys:N
计数方向:BIDIRECTIONAL系列:AC
JESD-30 代码:R-CDFP-F16负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:2.159 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:6.731 mm
最小 fmax:133 MHzBase Number Matches:1

74AC191FCX 数据手册

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November 1988  
Revised November 1999  
74AC191  
Up/Down Counter with Preset and Ripple Clock  
General Description  
Features  
The AC191 is a reversible modulo 16 binary counter. It fea-  
tures synchronous counting and asynchronous presetting.  
The preset feature allows the AC191 to be used in pro-  
grammable dividers. The Count Enable input, the Terminal  
Count output and the Ripple Clock output make possible a  
variety of methods of implementing multistage counters. In  
the counting modes, state changes are initiated by the ris-  
ing edge of the clock.  
ICC reduced by 50%  
High speed—133 MHz typical count frequency  
Synchronous counting  
Asynchronous parallel load  
Cascadable  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC191SC  
74AC191SJ  
74AC191MTC  
74AC191PC  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
Count Enable Input  
Clock Pulse Input  
CE  
CP  
P0P3  
Parallel Data Inputs  
Asynchronous Parallel Load Input  
Up/Down Count Control Input  
Flip-Flop Outputs  
PL  
U /D  
Q0Q3  
RC  
Ripple Clock Output  
TC  
Terminal Count Output  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009940  
www.fairchildsemi.com  

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