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74AC191 PDF预览

74AC191

更新时间: 2024-11-22 22:38:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器时钟
页数 文件大小 规格书
10页 117K
描述
Up/Down Counter with Preset and Ripple Clock

74AC191 数据手册

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November 1988  
Revised November 1999  
74AC191  
Up/Down Counter with Preset and Ripple Clock  
General Description  
Features  
The AC191 is a reversible modulo 16 binary counter. It fea-  
tures synchronous counting and asynchronous presetting.  
The preset feature allows the AC191 to be used in pro-  
grammable dividers. The Count Enable input, the Terminal  
Count output and the Ripple Clock output make possible a  
variety of methods of implementing multistage counters. In  
the counting modes, state changes are initiated by the ris-  
ing edge of the clock.  
ICC reduced by 50%  
High speed—133 MHz typical count frequency  
Synchronous counting  
Asynchronous parallel load  
Cascadable  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC191SC  
74AC191SJ  
74AC191MTC  
74AC191PC  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
Count Enable Input  
Clock Pulse Input  
CE  
CP  
P0P3  
Parallel Data Inputs  
Asynchronous Parallel Load Input  
Up/Down Count Control Input  
Flip-Flop Outputs  
PL  
U /D  
Q0Q3  
RC  
Ripple Clock Output  
TC  
Terminal Count Output  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009940  
www.fairchildsemi.com  

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