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74LVC1G17GW PDF预览

74LVC1G17GW

更新时间: 2024-01-31 23:17:47
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
19页 280K
描述
Single Schmitt trigger bufferProduction

74LVC1G17GW 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP, TSSOP5/6,.08Reach Compliance Code:unknown
风险等级:5.75JESD-30 代码:R-PDSO-G5
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:BUFFER最大I(ol):0.024 A
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:3.3 V
Prop。Delay @ Nom-Sup:7 ns认证状态:Not Qualified
施密特触发器:YES子类别:Gates
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
Base Number Matches:1

74LVC1G17GW 数据手册

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Nexperia  
74LVC1G17  
Single Schmitt trigger buffer  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range  
-40 °C to +125 °C  
Name  
Description  
Version  
74LVC1G17GW  
TSSOP5  
plastic thin shrink small outline package; 5 leads; SOT353-1  
body width 1.25 mm  
74LVC1G17GV  
74LVC1G17GM  
-40 °C to +125 °C  
-40 °C to +125 °C  
SC-74A  
XSON6  
plastic surface-mounted package; 5 leads  
SOT753  
SOT886  
plastic extremely thin small outline package;  
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm  
74LVC1G17GN  
74LVC1G17GS  
74LVC1G17GX  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
XSON6  
XSON6  
X2SON5  
extremely thin small outline package; no leads;  
6 terminals; body 0.9 × 1.0 × 0.35 mm  
SOT1115  
SOT1202  
SOT1226-3  
extremely thin small outline package; no leads;  
6 terminals; body 1.0 × 1.0 × 0.35 mm  
plastic thermal enhanced extremely thin  
small outline package; no leads; 5 terminals;  
body 0.8 × 0.8 × 0.32 mm  
74LVC1G17GX4  
-40 °C to +125 °C  
X2SON4  
plastic thermal enhanced extremely thin  
small outline package; no leads; 4 terminals;  
body 0.6 × 0.6 × 0.32 mm  
SOT1269-2  
4. Marking  
Table 2. Marking codes  
Type number  
Marking[1]  
74LVC1G17GW  
74LVC1G17GV  
74LVC1G17GM  
74LVC1G17GN  
74LVC1G17GS  
74LVC1G17GX  
74LVC1G17GX4  
VJ  
V17  
VJ  
VJ  
VJ  
VJ  
VJ  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
A
Y
A
Y
mnb150  
mnb151  
mnb152  
Fig. 1. Logic symbol  
Fig. 2. IEC logic symbol  
Fig. 3. Logic diagram  
©
74LVC1G17  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
Rev. 14 — 14 January 2022  
2 / 19  
 
 
 
 

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