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73K324BL-IH PDF预览

73K324BL-IH

更新时间: 2024-11-11 20:22:55
品牌 Logo 应用领域
TERIDIAN 电信电信集成电路
页数 文件大小 规格书
34页 291K
描述
Modem, 2.4kbps Data, CMOS, PQCC32, PLASTIC, LCC-32

73K324BL-IH 技术参数

生命周期:Obsolete包装说明:PLASTIC, LCC-32
Reach Compliance Code:unknown风险等级:5.04
其他特性:DATA RATE MIN:300BPS数据速率:2.4 Mbps
JESD-30 代码:R-PQCC-J32长度:13.97 mm
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:RECTANGULAR封装形式:CHIP CARRIER
认证状态:Not Qualified座面最大高度:3.55 mm
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:MODEM
温度等级:INDUSTRIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:11.43 mmBase Number Matches:1

73K324BL-IH 数据手册

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73K324BL  
CCITT V.22bis,V.23,V.22,V.21,Bell 212A  
Single-Chip Modem w/ Integrated  
Hybrid  
DATA SHEET  
JULY 2005  
DESCRIPTION  
FEATURES  
The 73K324BL is a highly integrated single-chip  
modem IC which provides the functions needed to  
construct a V.22bis compatible modem, capable of  
2400 bps full-duplex operation over dial-up lines. The  
73K324BL is an enhancement of the 73K324L single-  
chip modem, which adds the hybrid hook switch  
control, and driver to the 73K324L. The 73K324BL  
integrates analog, digital, and switched-capacitor  
array functions on a single chip, offering excellent  
performance and a high level of functional integration  
in a 32-Lead PLCC package.  
Includes features of 73K324L single-chip  
modem  
On chip 2-wire/4-wire hybrid driver and off  
hook relay buffer  
One-chip multi-mode V.22bis/V.22/V.21/V.23  
and Bell 212A compatible modem data pump  
FSK (300/1200 bps), DPSK (600, 1200 bps), or  
QAM (2400 bps) encoding  
Software compatible with other Semi-  
conductor K-Series one-chip modems  
The 73K324BL operates from a single +5 V supply for  
low power consumption.  
Interfaces directly with standard micro-  
processors (80C51 typical)  
Parallel or serial bus for control  
The 73K324BL is designed to appear to the systems  
designer as a microprocessor peripheral, and will  
easily interface with popular single-chip micro-  
processors (80C51 typical) for control of modem  
functions through its 8-bit multiplexed address/data  
bus or via an optional serial control bus. An ALE  
control simplifies address demultiplexing. Data  
communications normally occur through a separate  
serial port.  
Selectable  
asynch/synch  
with  
internal  
buffer/debuffer and scrambler/descrambler  
functions  
All asynchronous and synchronous operating  
modes (internal, external, slave)  
(continued)  
(continued)  
BLOCK DIAGRAM  
DTMF,  
ANSWER,  
GUARD &  
CALLING  
TONE  
OH  
GENERATOR  
FSK  
MODULATOR  
DI-BIT/  
QUAD-BIT  
ENCODER  
BUFFER  
SCRAMBLER  
FILTER  
FIR  
QAM/  
DPSK  
PULSE  
SHAPER  
EQUALIZER  
EQUALIZER  
FILTER  
MODULATOR  
ATTENUATOR  
8-BIT  
µP  
TXA1  
TXA2  
BUS  
2W/4W  
HYBRID  
INTERFACE  
FILTER  
A/D  
RXA  
DIGITAL  
SIGNAL  
DI-BIT/  
DEBUFFER  
DESCRAMBLER  
QUAD-BIT  
DECODER  
PASS  
BAND  
PROCESSOR  
RECEIVE  
ANTI-ALIAS  
FILTER  
FILTER  
FUNCTIONS  
FIXED  
DEMODULATOR  
AGC  
GAIN  
BOOST  
TXD  
RXD  
SERIAL  
INTERFACE  
TONE  
DETECTION  
Page: 1 of 34  
© 2005 TERIDIAN Semiconductor Corporation  
Rev 6.0  

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