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73K324L PDF预览

73K324L

更新时间: 2024-11-11 06:31:43
品牌 Logo 应用领域
TERIDIAN 调制解调器
页数 文件大小 规格书
30页 239K
描述
Single-Chip Modem

73K324L 数据手册

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73K324L  
CCITT V.22bis,V.23,V.22,V.21,Bell 212A  
Single-Chip Modem  
Simplifying System Integration™  
DATA SHEET  
JUNE 2008  
DESCRIPTION  
FEATURES  
The 73K324L is a highly integrated single-chip  
modem IC, which provides the functions, needed to  
One chip Multi-mode CCITT V.22bis, V.22, V.21,  
V.23 and Bell 212A compatible modem data pump  
design  
a Quad-mode CCITT and Bell 212A  
FSK (75, 300, 1200 bit/s), DPSK (600, 1200 bit/s),  
or QAM (2400 bit/s) encoding  
compatible modem capable of operation over dial-up  
lines. The 73K324L adds V.23 capability to the  
CCITT modes of TERIDIAN Semiconductor  
Corporation's 73K224 one-chip modem, allowing a  
one-chip implementation in designs intended for  
European markets, which require this added  
Modulation mode. The 73K324L offers excellent  
Pin and software compatible with other  
TERIDIAN Semiconductor Corporation K-Series  
family one-chip modems  
Interfaces directly with standard  
microprocessors (8048, 80C51 typical)  
performance and  
a
high level of functional  
Serial and parallel microprocessor bus for  
control  
integration in a single IC. The device supports  
V.22bis, V.22, Bell 212A, V.21, and V.23 operating  
Selectable asynch/synch with internal  
buffer/debuffer and scrambler/descrambler  
functions  
modes,  
allowing  
both  
synchronous  
and  
asynchronous operation as defined by the  
appropriate standard.  
All synchronous (internal, external, slave) and  
Asynchronous Operating modes  
The 73K324L is designed to appear to the Systems  
Engineer as a microprocessor peripheral, and will  
Adaptive equalization for optimum performance  
over all lines  
easily  
interface  
with  
popular  
one-chip  
microcontrollers (80C51 typical) for control of  
modem functions through its 8-bit multiplexed  
address/data bus. A serial control bus is available  
for applications not requiring a parallel interface. An  
optional package with only the serial control bus is  
also available. Data communications occurs through  
Programmable transmit attenuation (16 dB, 1 dB  
steps), and selectable receive boost (+18 dB)  
Call progress, carrier, answer tone, unscrambled  
mark, S1, and signal quality monitors  
DTMF, answer, calling, SCT and guard tone  
generators  
a separate serial port.  
Test modes available: ALB, DL, RDL; Mark, Space  
and Alternating bit pattern generators  
(continued)  
CMOS technology for low power consumption  
(100 MW @ 5 V) with power-down mode  
(15 mW @ 5V)  
4-wire full duplex operation in all modes  
BLOCK DIAGRAM  
DTMF,  
ANSWER,  
GUARD  
&
CALLING  
TONE  
GENERATOR  
FSK  
MODULATOR  
DI-BIT/  
BUFFER  
SCRAMBLER  
QUAD-BIT  
ENCODER  
FIR  
PULSE  
SHAPER  
QAM/  
DPSK  
MODULATOR  
FILTER  
TXA1  
EQUALIZER  
FILTER  
8-BIT  
µP  
BUS  
ATTENUATOR  
INTERFACE  
FILTER  
A/D  
DIGITAL  
SIGNAL  
PROCESSOR  
RECEIVE  
DI-BIT/  
QUAD-BIT  
DECODER  
DEBUFFER  
DESCRAMBLER  
PASS  
BAND  
FILTER  
EQUALIZER  
ANTI-ALIAS  
FILTER  
FUNCTIONS  
RXA  
FIXED  
DEMODULATOR  
6dB  
GAIN  
BOOST  
6dB  
GAIN  
BOOST  
6dB  
GAIN  
BOOST  
TXD  
RXD  
SERIAL  
INTERFACE  
TONE  
DETECTION  
Page: 1 of 30  
© 2005, 2008 TERIDIAN Semiconductor Corporation  
Rev 7.1  

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