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72V8981DBG

更新时间: 2024-11-13 21:04:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
11页 257K
描述
Digital Time Switch

72V8981DBG 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.72
峰值回流温度(摄氏度):NOT SPECIFIED处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

72V8981DBG 数据手册

 浏览型号72V8981DBG的Datasheet PDF文件第2页浏览型号72V8981DBG的Datasheet PDF文件第3页浏览型号72V8981DBG的Datasheet PDF文件第4页浏览型号72V8981DBG的Datasheet PDF文件第5页浏览型号72V8981DBG的Datasheet PDF文件第6页浏览型号72V8981DBG的Datasheet PDF文件第7页 
3.3 VOLT TIME SLOT INTERCHANGE  
DIGITAL SWITCH  
128 x 128  
IDT72V8981  
outputs,eachofwhichconsistsof32channels(64Kbit/sperchannel)toform  
amultiplexed2.048Mb/sstream.  
FEATURES:  
128 x 128 channel non-blocking switch  
Serial Telecom Bus Compatible (ST-BUS®)  
4 RX inputs32 channels at 64 Kbit/s per serial line  
4 TX output32 channels at 64 Kbit/s per serial line  
Three-state serial outputs  
Microprocessor Interface (8-bit data bus)  
3.3V Power Supply  
Available in 44-pin Plastic Leaded Chip Carrier (PLCC), and  
44-pin Plastic Quad Flatpack (PQFP)  
FUNCTIONALDESCRIPTION  
AfunctionalblockdiagramoftheIDT72V8981deviceisshownbelow. The  
serial streamsoperatecontinuouslyat2.048Mb/sandarearrangedin125µs  
wideframeseachcontaining32,8-bitchannels. Fourinput(RX0-3)andfour  
output (TX0-3)serialstreamsareprovidedintheIDT72V8981deviceallowing  
acomplete128x128channelnon-blockingswitchmatrixtobeconstructed.  
Theserialinterfaceclock(C4i)forthedeviceis4.096MHz.  
Operating Temperature Range -40°C to +85°C  
3.3V I/O with 5V Tolerant Inputs  
Thereceivedserialdataisinternallyconvertedtoaparallelformatbythe  
onchipserial-to-parallelconvertersandstoredsequentiallyina128-position  
DataMemory.Byusinganinternalcounterthatisresetbytheinput8KHzframe  
pulse,F0i,theincomingserialdatastreamscanbeframedandsequentially  
addressed.  
DESCRIPTION:  
TheIDT72V8981isaST-BUS® compatibledigitalswitchcontrolledbya  
microprocessor. TheIDT72V8981canhandleasmanyas128,64Kbit/sinput  
andoutputchannels. Those128channelsaredividedinto4serialinputsand  
Datatobeoutputontheserialstreamsmaycomefromtwosources:Data  
MemoryorConnectionMemory. TheConnectionMemoryis16bitswideand  
FUNCTIONAL BLOCK DIAGRAM  
ODE  
C4i F0i  
VCC GND  
Timing  
Unit  
Output MUX  
RX0  
TX0  
TX1  
TX2  
TX3  
Transmit  
Serial Data  
Streams  
Receive  
Serial Data  
Streams  
RX1  
Data  
Memory  
RX2  
RX3  
Connection  
Memory  
Control Register  
Microprocessor Interface  
5702 drw01  
DS  
A0/  
A5  
CS  
R/W  
D0/  
D7  
DTA  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheST-BUSisatrademarkofMitelCorp.  
AUGUST 2003  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-5702/4  

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