Datasheet > 72V3664L10PFG

72V3664L10PFG

更新时间： 2024-11-26 01:08:23

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片配套器件
页数	文件大小	规格书
37页	275K
描述
3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING

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中文翻译

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数据手册
替代型号

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72V3664L10PFG 数据手册

3.3 VOLT CMOS SyncBiFIFO^TM

WITH BUS-MATCHING

4,096 x 36 x 2

IDT72V3664

• Big- or Little-Endian format for word and byte bus sizes

• Retransmit Capability

FEATURES

• Memory storage capacity:

• Master Reset clears data and configures FIFO, Partial Reset

clears data but retains configuration settings

• Mailbox bypass registers for each FIFO

• Free-running CLKA and CLKB may be asynchronous or coincident

(simultaneous reading and writing of data on a single clock edge

is permitted)

• Auto power down minimizes power dissipation

• Available in space saving 128-pin Thin Quad Flatpack (TQFP)

• Pin and functionally compatible version of the 5V operating

IDT723664

IDT72V3664

–

4,096 x 36 x 2

• Clock frequencies up to 100 MHz (6.5ns access time)

• Two independent clocked FIFOs buffering data in opposite

directions

• Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

functions) or First Word Fall Through Timing (using ORA, ORB,

IRA, and IRB flag functions)

• Programmable Almost-Empty and Almost-Full flags; each has five

default offsets (8, 16, 64, 256 and 1,024 )

• Serial or parallel programming of partial flags

• Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits

(byte)

• Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

CLKA

Port-A

Control

Logic

CSA

W/RA

ENA

RAM ARRAY

4,096 x 36

MBA

FIFO1,

Mail1

Reset

Logic

MRS1

PRS1

Write

Pointer

Read

Pointer

Status Flag

Logic

EFB/ORB

AEB

FFA/IRA

AFA

FIFO1

FIFO2

FS2

FS0/SD

Programmable Flag

Offset Registers

Timing

Mode

FWFT

FS1/SEN

B0-B35

A0-A35

Status Flag

Logic

EFA/ORA

FFB/IRB

AFB

AEA

Read

Pointer

Write

Pointer

FIFO2,

Mail2

Reset

Logic

MRS2

PRS2

RT1

RTM

RT2

FIFO1 and

FIFO2

Retransmit

Logic

RAM ARRAY

4,096 x 36

CLKB

CSB

W/RB

ENB

MBB

Port-B

Control

Logic

Mail 2

MBF2

SIZE

4664 drw01

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheSyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

JUNE 2016

COMMERCIAL TEMPERATURE RANGE

DSC-4664/7

12 3 4 5 6 7...37

中文翻译

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72V3664L10PFG 替代型号

型号	品牌	替代类型	描述	数据表
IDT72V3664L10PFG	IDT	功能相似	FIFO, 4KX36, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
CY7C43664AV-7AC	CYPRESS	功能相似	3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO with Bus Matching

与72V3664L10PFG相关器件

型号	品牌	获取价格	描述	数据表
72V3664L10PFG8	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING
72V3664L15PFG	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING
72V3664L15PFG8	IDT	获取价格	3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING
72V3666L10PF	IDT	获取价格	TQFP-128, Tray
72V3666L10PF8	IDT	获取价格	TQFP-128, Reel
72V3666L10PFG	IDT	获取价格	3.3 VOLT CMOS TRIPLE BUS SyncFIFO WITH BUS-MATCHING
72V3666L15PF	IDT	获取价格	TQFP-128, Tray
72V3666L15PF8	IDT	获取价格	TQFP-128, Reel
72V3666L15PFG	IDT	获取价格	3.3 VOLT CMOS TRIPLE BUS SyncFIFO WITH BUS-MATCHING
72V3670	RENESAS	获取价格	8K x 36 SuperSync II FIFO, 3.3V

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