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72V04L15JG PDF预览

72V04L15JG

更新时间： 2024-09-18 00:57:23
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
12页 301K
描述
3.3 VOLT CMOS ASYNCHRONOUS FIFO

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中文翻译

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72V04L15JG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：PLCC
包装说明：,针数：32
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：2.18
Samacsys Description：PLCC RECTANGULARJESD-609代码：e3
湿度敏感等级：1端子面层：Matte Tin (Sn) - annealed
Base Number Matches：1

72V04L15JG 数据手册

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3.3 VOLT CMOS ASYNCHRONOUS FIFO  
512 x 9, 1,024 x 9,  
2,048 x 9, 4,096 x 9,  
IDT72V01, IDT72V02  
IDT72V03, IDT72V04  
IDT72V05, IDT72V06  
8,192 x 9, 16,384 x 9  
FEATURES:  
DESCRIPTION:  
• 3.3V family uses less power than the 5 Volt 7201/7202/7203/7204/  
7205/7206family  
The IDT72V01/72V02/72V03/72V04/72V05/72V06 are dual-port FIFO  
memoriesthatoperateatapowersupplyvoltage(Vcc)between3.0Vand3.6V.  
Theirarchitecture, functionaloperationandpinassignmentsareidenticalto  
those of the IDT7201/7202/7203/7204/7205/7206. These devices load and  
emptydataonafirst-in/first-outbasis.TheyuseFullandEmptyflagstoprevent  
data overflow and underflow and expansion logic to allow for unlimited  
expansion capability in both word size and depth.  
• 512 x 9 organization (72V01)  
• 1,024 x 9 organization (72V02)  
• 2,048 x 9 organization (72V03)  
• 4,096 X 9 organization (72V04)  
• 8,192 x 9 organization (72V05)  
• 16,384 X 9 organization (72V06)  
• Functionally compatible with 720x family  
• Low-power consumption  
— Active: 180 mW (max.)  
— Power-down: 18 mW (max.)  
• 15 ns access time  
The reads and writes are internally sequential through the use of ring  
pointers,withnoaddressinformationrequiredtoloadandunloaddata.Data  
istoggledinandoutofthedevicesthroughtheuseoftheWrite(W)andRead  
(R) pins. The devices have a maximum data access time as fast as 25 ns.  
Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits  
attheuser’soption.Thisfeatureisespeciallyusefulindatacommunications  
applicationswhereitisnecessarytouseaparitybitfortransmission/reception  
errorchecking.TheyalsofeatureaRetransmit(RT)capabilitythatallowsfor  
resetofthereadpointertoitsinitialpositionwhenRTispulsedLOWtoallowfor  
retransmissionfromthebeginningofdata.AHalf-FullFlagisavailableinthe  
singledevicemodeandwidthexpansionmodes.  
• Asynchronous and simultaneous read and write  
• Fully expandable by both word depth and/or bit width  
• Status Flags: Empty, Half-Full, Full  
• Auto-retransmit capability  
• Available in 32-pin PLCC  
•
Industrial temperature range (–40  
°
C to +85  
°
C) is available  
These FIFOs are fabricated using high-speed CMOS technology. It has  
beendesignedforthoseapplicationsrequiringasynchronousandsimultane-  
ousread/writesinmultiprocessingandratebufferapplications.  
• Green parts available, see ordering information  
FUNCTIONAL BLOCK DIAGRAM  
DATA INPUTS  
(D0-D8)  
WRITE  
CONTROL  
W
RAM  
ARRAY  
512 x 9  
1,024 x 9  
2,048 x 9  
4,096 x 9  
8,192 x 9  
16,384 x 9  
WRITE  
POINTER  
READ  
POINTER  
THREE-  
STATE  
BUFFERS  
RS  
DATA OUTPUTS  
READ  
CONTROL  
(Q0-Q8)  
RESET  
LOGIC  
R
FLAG  
LOGIC  
EF  
FF  
FL/RT  
EXPANSION  
LOGIC  
XI  
XO/HF  
3033 drw 01  
IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc  
JUNE 2012  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
1
©2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-3033/7  
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中文翻译

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72V04L15JG 替代型号

型号 品牌 替代类型 描述 数据表
72V04L15J IDT

完全替代

 PLCC-32, Tube
72V04L15JG8 IDT

完全替代

 3.3 VOLT CMOS ASYNCHRONOUS FIFO

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72V04L15JG8 IDT

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 		3.3 VOLT CMOS ASYNCHRONOUS FIFO
72V04L15JGI IDT

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 		3.3 VOLT CMOS ASYNCHRONOUS FIFO
72V04L15JGI8 IDT

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 		3.3 VOLT CMOS ASYNCHRONOUS FIFO
72V04L25J IDT

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 		PLCC-32, Tube
72V04L25JG IDT

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 		FIFO, 4KX9, 25ns, Asynchronous, CMOS, PQCC32, GREEN, PLASTIC, LCC-32
72V04L25JG8 IDT

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 		FIFO, 4KX9, 25ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
72V04L25JGI IDT

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 		3.3 VOLT CMOS ASYNCHRONOUS FIFO
72V04L25JGI8 IDT

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 		3.3 VOLT CMOS ASYNCHRONOUS FIFO
72V04L25JI IDT

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 		PLCC-32, Tube
72V04L35J IDT

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 		PLCC-32, Tube

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