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72P51359L5BB PDF预览

72P51359L5BB

更新时间: 2024-11-07 05:56:27
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
87页 829K
描述
PBGA-256, Tray

72P51359L5BB 数据手册

 浏览型号72P51359L5BB的Datasheet PDF文件第2页浏览型号72P51359L5BB的Datasheet PDF文件第3页浏览型号72P51359L5BB的Datasheet PDF文件第4页浏览型号72P51359L5BB的Datasheet PDF文件第5页浏览型号72P51359L5BB的Datasheet PDF文件第6页浏览型号72P51359L5BB的Datasheet PDF文件第7页 
1.8VMULTI-QUEUEFLOW-CONTROLDEVICES  
(8QUEUES)36BITWIDECONFIGURATION  
589,824bits  
1,179,648bits  
2,359,296bits  
IDT72P51339  
IDT72P51349  
IDT72P51359  
IDT72P51369  
4,718,592bits  
– x36 in to x36 out  
– x36in to x18out  
– x36in to x9out  
User selectable I/O: 1.5V HSTL, 1.8V eHSTL, or 2.5V LVTTL  
100% Bus Utilization, Read and Write on every clock cycle  
Selectable First Word Fall Through (FWFT) or IDT standard  
mode of operation  
Ability to operate on packet or word boundaries  
Mark and Re-Write operation  
– x18 in to x36 out  
– x18 in to x18 out  
– x18 in to x9 out  
– x9 in to x36 out  
– x9 in to x18 out  
– x9 in to x9 out  
FEATURES  
Choose from among the following memory density options:  
IDT72P51339  
IDT72P51349  
IDT72P51359  
IDT72P51369  
Total Available Memory = 589,824 bits  
Total Available Memory = 1,179,648 bits  
Total Available Memory = 2,359,296 bits  
Total Available Memory = 4,718,592 bits  
Configurable from 1 to 8 Queues  
Default configuration of 8 or 4 symmetrical queues  
Default multi-queue device configurations  
IDT72P51339: 2,048 x 36 x 8Q  
Mark and Re-Read operation  
Individual, Active queue flags (OR / EF, IR / FF, PAE, PAF, PR)  
8 bit parallel flag status on both read and write ports  
Direct or polled operation of flag status bus  
Expansion of up to 64 queues and/or 32Mb logical configura-  
tion using up to 8 multi-queue devices in parallel  
JTAG Functionality (Boundary Scan)  
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm  
HIGH Performance submicron CMOS technology  
Industrial temperature range (-40°C to +85°C) is available  
Green parts available, see Ordering Information  
IDT72P51349: 4,096 x 36 x 8Q  
IDT72P51359: 8,192 x 36 x 8Q  
IDT72P51369: 16,384 x 36 x 8Q  
Default configuration can be augmented via the queue address  
bus  
Number of queues and individual queue sizes may be  
configured at master reset though serial programming  
200 MHz High speed operation (5ns cycle time)  
3.6ns access time  
Independent Read and Write access per queue  
User Selectable Bus Matching Options:  
FUNCTIONALBLOCKDIAGRAM  
MULTI-QUEUE FLOW-CONTROL DEVICE  
RADEN  
ESTR  
Q7  
WADEN  
FSTR  
RDADD  
WRADD  
8
8
REN  
RCLK  
RCS  
WEN  
Q6  
Q5  
WCLK  
WCS  
OE  
Q
out  
x36, x18 or x9  
DATA OUT  
D
in  
x36, 18 or x9  
DATA IN  
EF/OR  
FF/IR  
PAF  
PR  
PAE  
Q0  
PAFn  
PAEn  
PRn  
8
8
6716 drw01  
CIDTOandMtheMIDTElogRoaCretrIaAdemLarksAofInNtegDratedIDNevicDeTUechSnolTogyR,InIcAL TEMPERATURE RANGES  
AUGUST 2005  
1
2005 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-6716/3  

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