Datasheet > 72P51549L6BB8

72P51549L6BB8

更新时间： 2024-11-10 09:22:11

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
87页	794K
描述
PBGA-256, Reel

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中文翻译

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数据手册

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72P51549L6BB8 数据手册

1.8VMULTI-QUEUEFLOW-CONTROLDEVICES

(32QUEUES)36BITWIDECONFIGURATION

589,824bits

1,179,648bits

2,359,296bits

IDT72P51539

IDT72P51549

IDT72P51559

IDT72P51569

4,718,592bits

•

User Selectable Bus Matching Options:

FEATURES

– x36 in to x36 out

– x36in to x18out

– x36in to x9out

– x18 in to x36 out

– x18 in to x18 out

– x18 in to x9 out

– x9 in to x36 out

– x9 in to x18 out

– x9 in to x9 out

•

Choose from among the following memory density options:

IDT72P51539

IDT72P51549

IDT72P51559

IDT72P51569

⎯

Total Available Memory = 589,824 bits

Total Available Memory = 1,179,648 bits

Total Available Memory = 2,359,296 bits

Total Available Memory = 4,718,592 bits

•

User selectable I/O: 1.5V HSTL, 1.8V eHSTL, or 2.5V LVTTL

100% Bus Utilization, Read and Write on every clock cycle

Selectable First Word Fall Through (FWFT) or IDT standard

mode of operation

Ability to operate on packet or word boundaries

Mark and Re-Write operation

•

Configurable from 1 to 32 Queues

Default configuration of 32 or 16 symmetrical queues

Default multi-queue device configurations

– IDT72P51539: 512 x 36 x 32Q

•

Mark and Re-Read operation

– IDT72P51549: 1,024 x 36 x 32Q

– IDT72P51559: 2,048 x 36 x 32Q

– IDT72P51569: 4,096 x 36 x 32Q

Individual, Active queue flags (OR / EF, IR / FF, PAE, PAF, PR)

8 bit parallel flag status on both read and write ports

Direct or polled operation of flag status bus

Expansion of up to 256 queues and/or 32Mb logical configura-

tion using up to 8 multi-queue devices in parallel

JTAG Functionality (Boundary Scan)

Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm

HIGH Performance submicron CMOS technology

Industrial temperature range (-40°C to +85°C) is available

Green parts available, see Ordering Information

•

Default configuration can be augmented via the queue address

bus

Number of queues and individual queue sizes may be

configured at master reset though serial programming

200 MHz High speed operation (5ns cycle time)

3.6ns access time

•

Independent Read and Write access per queue

FUNCTIONALBLOCKDIAGRAM

MULTI-QUEUE FLOW-CONTROL DEVICE

RADEN

ESTR

Q31

WADEN

FSTR

RDADD

WRADD

REN

RCLK

RCS

WEN

Q30

Q29

WCLK

WCS

out

x36, x18 or x9

DATA OUT

x36, 18 or x9

DATA IN

EF/OR

FF/IR

PAF

PAE

PAFn

PAEn

PRn

6715 drw01

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc

FEBRUARY 2009

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

DSC-6715/4

12 3 4 5 6 7...87

中文翻译

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与72P51549L6BB8相关器件

型号	品牌	获取价格	描述	数据表
72P51549L6BBG	IDT	获取价格	FIFO, 32KX36, 3.7ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, GREEN, PLASTIC, B
72P51549L6BBGI	IDT	获取价格	FIFO, 32KX36, 3.7ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, GREEN, PLASTIC, B
72P51549L6BBI	IDT	获取价格	PBGA-256, Tray
72P51559L5BB8	IDT	获取价格	PBGA-256, Reel
72P51559L5BBG	IDT	获取价格	FIFO, 64KX36, 3.6ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, GREEN, PLASTIC, B
72P51559L6BB	IDT	获取价格	PBGA-256, Tray
72P51559L6BBG	IDT	获取价格	FIFO, 64KX36, 3.7ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, GREEN, PLASTIC, B
72P51559L6BBGI	IDT	获取价格	FIFO, 64KX36, 3.7ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, GREEN, PLASTIC, B
72P51569L5BB	IDT	获取价格	PBGA-256, Tray
72P51569L5BB8	IDT	获取价格	PBGA-256, Reel

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