Datasheet > 72821L15PFG

72821L15PFG

更新时间： 2024-11-10 00:47:55

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
16页	344K
描述
DUAL CMOS SyncFIFO

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

72821L15PFG 数据手册

IDT72801

IDT72811

IDT72821

IDT72831

IDT72841

IDT72851

DUAL CMOS SyncFIFO™

DUAL 256 x 9, DUAL 512 x 9,

DUAL 1,024 x 9, DUAL 2,048 x 9,

DUAL 4,096 x 9, DUAL 8,192 x 9

Each of the two FIFOs (designated FIFO A and FIFO B) contained in the

IDT72801/72811/72821/72831/72841/72851hasa9-bitinputdataport(DA0

-DA8,DB0-DB8)anda9-bitoutputdataport(QA0-QA8,QB0-QB8).Each

inputportiscontrolledbyafree-runningclock(WCLKA,WCLKB),andtwoWrite

Enablepins(WENA1,WENA2,WENB1,WENB2). Dataiswrittenintoeachof

thetwoarraysoneveryrisingclockedgeoftheWriteClock(WCLKA,WCLKB)

when the appropriate write enable pins are asserted.

FEATURES:

•

The IDT72801 is equivalent to two IDT72201 256 x 9 FIFOs

The IDT72811 is equivalent to two IDT72211 512 x 9 FIFOs

The IDT72821 is equivalent to two IDT72221 1,024 x 9 FIFOs

The IDT72831 is equivalent to two IDT72231 2,048 x 9 FIFOs

The IDT72841 is equivalent to two IDT72241 4,096 x 9 FIFOs

The IDT72851 is equivalent to two IDT72251 8,192 x 9 FIFOs

TheoutputportofeachFIFObankiscontrolledbyitsassociated clockpin

(RCLKA, RCLKB) and two Read Enable pins (RENA1, RENA2, RENB1,

RENB2).TheReadClockcanbetiedtotheWriteClockforsingleclockoperation

orthetwoclockscanrunasynchronousofoneanotherfordualclockoperation.

An Output Enable pin (OEA, OEB) is provided on the read port of each FIFO

forthree-stateoutputcontrol.

• Offers optimal combination of large capacity, high speed,

design flexibility and small footprint

• Ideal for prioritization, bidirectional, and width expansion

applications

• 10 ns read/write cycle time for the IDT72801/72811/72821/72831/

72841/72851

EachofthetwoFIFOshastwofixedflags,Empty(EFA,EFB)andFull(FFA,

FFB). Twoprogrammableflags,Almost-Empty(PAEA,PAEB)andAlmost-Full

(PAFA,PAFB),areprovidedforeachFIFObanktoimprovememoryutilization.

Ifnotprogrammed,theprogrammableflagsdefaulttoempty+7forPAEAand

PAEB, and full-7 for PAFA and PAFB.

TheIDT72801/72811/72821/72831/72841/72851architecturelendsitself

tomanyflexibleconfigurationssuchas:

• 2-levelprioritydatabuffering

• Separate control lines and data lines for each FIFO

• Separate Empty, Full, Programmable Almost-Empty and Almost-

Full flags for each FIFO

• Enable puts output data lines in high-impedance state

• Space-saving 64-pin Thin Quad Flat Pack (TQFP) and Slim Thin

Quad Flatpack (STQFP)

•

Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

• Bidirectional operation

• Width expansion

• Depthexpansion

These FIFOs is fabricated using high-performance submicron CMOS

technology.

DESCRIPTION:

TheIDT72801/72811/72821/72831/72841/72851aredualsynchronous

(clocked)FIFOs. ThedeviceisfunctionallyequivalenttotwoIDT72201/72211/

72221/72231/72241/72251 FIFOs in a single package with all associated

control,data,andflaglinesassignedtoseparatepins.

FUNCTIONAL BLOCK DIAGRAM

EFA

WCLKB

PAEA

PAFA

FFA

WCLKA

WENA1

WENA2

WENB1

DA0 - DA8

DB0 - DB8

LDA

LDB

WENB2

INPUT REGISTER

OFFSET REGISTER

INPUT REGISTER

EFB

FLAG

LOGIC

WRITE CONTROL

LOGIC

FLAG

LOGIC

WRITE CONTROL

LOGIC

PAEB

PAFB

FFB

RAM ARRAY

256 x 9, 512 x 9,

1024 x 9, 2048 x 9,

4096 x 9, 8192 x 9

RAM ARRAY

256 x 9, 512 x 9,

1024 x 9, 2048 x 9,

4096 x 9, 8192 x 9

WRITE POINTER

READ POINTER

WRITE POINTER

READ CONTROL

LOGIC

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

RCLKB

RSA

RSB

OEA

OEB

RCLKA

RENA1

RENA2

RENB1

QB0 - QB8

QA0 - QA8

RENB2

3034 drw 01

IDT, IDT logo and the SyncFIFOlogo are registered trademarks of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE

MARCH 2013

DSC-3034/6

12 3 4 5 6 7...16

中文翻译

下载PDF

72821L15PFG 替代型号

型号	品牌	替代类型	描述	数据表
72821L25TFG	IDT	功能相似	FIFO, 1KX9, 15ns, Synchronous, CMOS, PQFP64, GREEN, SLIM, TQFP-64
72821L15TFGI	IDT	功能相似	FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, SLIM, TQFP-64
72821L10TFG	IDT	功能相似	FIFO, 1KX9, 6.5ns, Synchronous, CMOS, PQFP64, GREEN, SLIM, TQFP-64

与72821L15PFG相关器件

型号	品牌	获取价格	描述	数据表
72821L15PFG8	IDT	获取价格	FIFO, 2KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, TQFP-64
72821L15PFGI	IDT	获取价格	FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, TQFP-64
72821L15PFGI8	IDT	获取价格	DUAL CMOS SyncFIFO
72821L15PFI	IDT	获取价格	TQFP-64, Tray
72821L15TFG	IDT	获取价格	DUAL CMOS SyncFIFO
72821L15TFG8	IDT	获取价格	DUAL CMOS SyncFIFO
72821L15TFGI	IDT	获取价格	FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, SLIM, TQFP-64
72821L15TFGI8	IDT	获取价格	DUAL CMOS SyncFIFO
72821L15TFI9	IDT	获取价格	FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, SLIM, TQFP-64
72821L25PF8	IDT	获取价格	TQFP-64, Reel

与72821L15PFG相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

22
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

21
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

47
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

39

产品中心

服务支持

精选活动

关于我们

帮助中心

72821L15PFG

72821L15PFG 数据手册

72821L15PFG 替代型号

与72821L15PFG相关器件

与72821L15PFG相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

72821L15PFG

72821L15PFG 数据手册

72821L15PFG 替代型号

与72821L15PFG相关器件

与72821L15PFG相关文章

您还可以找

您在本页遇到什么问题？