Datasheet > 71V3556S133BQGI8

71V3556S133BQGI8

更新时间： 2024-11-06 15:26:27

品牌	Logo	应用领域
艾迪悌 - IDT		时钟静态存储器内存集成电路
页数	文件大小	规格书
28页	641K
描述
ZBT SRAM, 128KX36, 4.2ns, CMOS, PBGA165

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技术参数
数据手册

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71V3556S133BQGI8 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.84
最长访问时间：	4.2 ns	最大时钟频率 (fCLK)：	133 MHz
I/O 类型：	COMMON	JESD-30 代码：	R-PBGA-B165
JESD-609代码：	e1	内存密度：	4718592 bit
内存集成电路类型：	ZBT SRAM	内存宽度：	36
湿度敏感等级：	3	端子数量：	165
字数：	131072 words	字数代码：	128000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	128KX36
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA165,11X15,40
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY
并行/串行：	PARALLEL	电源：	3.3 V
认证状态：	Not Qualified	最大待机电流：	0.045 A
最小待机电流：	3.14 V	子类别：	SRAMs
最大压摆率：	0.31 mA	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	Base Number Matches：	1

71V3556S133BQGI8 数据手册

IDT71V3556S/XS

IDT71V3558S/XS

IDT71V3556SA/XSA

IDT71V3558SA/XSA

128K x 36, 256K x 18

3.3VSynchronousZBTSRAMs

3.3V I/O, Burst Counter

PipelinedOutputs

Description

Features

◆

TheIDT71V3556/58are3.3Vhigh-speed4,718,592-bit(4.5Mega-

bit) synchronous SRAMS. They are designed to eliminate dead bus

cycles when turning the bus around between reads and writes, or

writes and reads. Thus, they have been given the name ZBT^TM, or

Zero Bus Turnaround.

128K x 36, 256K x 18 memory configurations

◆

Supports high performance system speed - 200 MHz

(3.2 ns Clock-to-Data Access)

ZBT^TMFeature - No dead cycles between write and read

◆

cycles

◆

Address and control signals are applied to the SRAM during one

clockcycle,andtwocycleslatertheassociateddatacycleoccurs,beit

read or write.

The IDT71V3556/58 contain data I/O, address and control signal

registers.Outputenableistheonlyasynchronoussignalandcanbeused

todisabletheoutputsatanygiventime.

A Clock Enable (CEN) pin allows operation of the IDT71V3556/58

to be suspended as long as necessary. All synchronous inputs are

ignored when (CEN) is high and the internal device registers will hold

their previous values.

Internally synchronized output buffer enable eliminates the

need to control OE

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

◆

signal registers for fully pipelined applications

4-word burst capability (interleaved or linear)

Individual byte write (BW1 - BW4) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%), 3.3V I/O Supply (VDDQ)

Optional- Boundary Scan JTAG Interface (IEEE 1149.1

◆

Therearethreechipenablepins(CE¹,CE2,CE2)thatallowtheuser

to deselect the device when desired. If any one of these three are not

asserted when ADV/LD is low, no new memory operation can be

initiated. However, any pending data transfers (reads or writes) will be

completed.Thedatabuswilltri-statetwocyclesafterchipisdeselected

orawriteisinitiated.

compliant)

◆

Packaged in a JEDEC standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array (fBGA)

PinDescriptionSummary

-A17

Address Inputs

Input

Output

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enables

1, CE

, CE

Output Enable

R/W

Read/Write Signal

Clock Enable

CEN

Individual Byte Write Selects

Clock

1, BW

, BW

CLK

ADV/LD

LBO

TMS

TDI

Advance burst address / Load new address

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Synchronous

Static

Synchronous

N/A

TCK

Test Clock

TDO

TRST

Test Data Output

Synchronous

Asynchronous

Synchronous

Static

JTAG Reset (Optional)

Sleep Mode

I/O

0-I/O31, I/OP1-I/OP4

Data Input / Output

Core Power, I/O Power

Ground

DD, VDDQ

Supply

Static

5281 tbl 01

FEBRUARY 2009

DSC-5281/09

12 3 4 5 6 7...28

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与71V3556S133BQGI8相关器件

型号	品牌	获取价格	描述	数据表
71V3556S133BQI	IDT	获取价格	ZBT SRAM, 128KX36, 4.2ns, CMOS, PBGA165, 13 X 15 MM, FINE PITCH, BGA-165
71V3556S133PFI	IDT	获取价格	ZBT SRAM, 128KX36, 4.2ns, CMOS, PQFP100, PLASTIC, TQFP-100
71V3556S133PFI8	IDT	获取价格	ZBT SRAM, 128KX36, 4.2ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
71V3556S166BGG	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, ROHS COMPLIANT, PLASTIC, MS-028AA, BG
71V3556S166BGG8	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119
71V3556S166BGGI	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, ROHS COMPLIANT, PLASTIC, MS-028AA, BG
71V3556S166BGGI8	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119
71V3556S166BGI	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
71V3556S166BGI8	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, POWER, PLASTIC, BGA-119
71V3556S166BQ	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FINE PITCH, BGA-165

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