Datasheet > 71V2556XS166BGG

71V2556XS166BGG

更新时间： 2024-11-07 00:21:43

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
25页	293K
描述
3.3V Synchronous ZBT SRAMs

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71V2556XS166BGG 数据手册

IDT71V2556S/XS

128K x 36

IDT71V2556SA/XSA

3.3V Synchronous ZBT™ SRAMs

2.5V I/O, Burst Counter

Pipelined Outputs

AddressandcontrolsignalsareappliedtotheSRAMduringoneclock

cycle, andtwocycleslatertheassociateddatacycleoccurs, beitread

or write.

Features

◆

128K x 36 memory configurations

◆

Supports high performance system speed - 166 MHz

The IDT71V2556 contains data I/O, address and control signal

registers.Outputenableistheonlyasynchronoussignalandcanbeused

todisabletheoutputsatanygiventime.

AClockEnable(CEN)pinallowsoperationoftheIDT71V2556tobe

suspended as long as necessary. All synchronous inputs are ignored

when(CEN)ishighandtheinternaldeviceregisterswillholdtheirprevious

values.

(3.5 ns Clock-to-Data Access)

ZBT^TMFeature - No dead cycles between write and read

◆

cycles

◆

Internally synchronized output buffer enable eliminates the

need to control OE

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

◆

Therearethreechipenablepins(CE1,CE2,CE2)thatallowtheuser

to deselect the device when desired. If any one of these three are not

assertedwhenADV/LDislow,nonewmemoryoperationcanbeinitiated.

However,anypendingdatatransfers(readsorwrites)willbecompleted.

Thedatabuswilltri-statetwocyclesafterchipisdeselectedorawriteis

initiated.

signal registers for fully pipelined applications

4-word burst capability (interleaved or linear)

Individual byte write (BW1 - BW4) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%), 2.5V I/O Supply (VDDQ)

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

◆

TheIDT71V2556hasanon-chipburstcounter.Intheburstmode,the

IDT71V2556 can provide four cycles of data for a single address

presentedtotheSRAM.Theorderoftheburstsequenceisdefinedbythe

LBOinputpin.TheLBOpinselectsbetweenlinearandinterleavedburst

sequence. The ADV/LD signal is used to load a new external address

(ADV/LD = LOW) or increment the internal burst counter (ADV/LD =

HIGH).

TheIDT71V2556SRAMsutilizeIDT's latesthigh-performanceCMOS

processandarepackagedinaJEDECstandard14mmx20mm100-pin

thinplasticquadflatpack(TQFP)aswellasa119ballgridarray(BGA).

complaint)

◆

Packaged in a JEDEC standard 100-pin plastic thin quad

flatpack (TQFP) and 119 ball grid array (BGA)

Description

TheIDT71V2556 isa3.3Vhigh-speed4,718,592-bit(4.5Megabit)

synchronous SRAM. It is designed to eliminate dead bus cycles when

turning the bus around between reads and writes, or writes and reads.

Thus, theyhavebeengiventhenameZBT^TM, orZeroBusTurnaround.

PinDescriptionSummary

A0-A16

Address Inputs

Input

Output

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enables

CE , CE

, CE

Output Enable

R/W

Read/Write Signal

Clock Enable

CEN

Individual Byte Write Selects

Clock

, BW

CLK

ADV/LD

LBO

TMS

TDI

Advance burst address / Load new address

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Synchronous

Static

Synchronous

N/A

TCK

TDO

TRST

Test Clock

Test Data Output

Synchronous

Asynchronous

Synchronous

Static

JTAG Reset (Optional)

Sleep Mode

I/O

-I/O31, I/OP1-I/OP4

DD, VDDQ

Data Input / Output

Core Power, I/O Power

Ground

Supply

Static

4875 tbl 01

APRIL 2011

DSC-4875/12

12 3 4 5 6 7...25

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与71V2556XS166BGG相关器件

型号	品牌	获取价格	描述	数据表
71V2556XS166BGG8	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166BGGI	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166BGGI8	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166BQ	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FPBGA-165
71V2556XS166BQGI	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA165, 15 X 13 MM, ROHS COMPLIANT, FBGA-165
71V2556XS166BQGI8	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA165
71V2556XS166PFG	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166PFG8	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166PFGI	IDT	获取价格	3.3V Synchronous ZBT SRAMs
71V2556XS166PFGI8	IDT	获取价格	ZBT SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, GREEN, PLASTIC, TQFP-100

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