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71T016SA20PH2 PDF预览

71T016SA20PH2

更新时间: 2024-11-10 07:38:51
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管
页数 文件大小 规格书
9页 137K
描述
Standard SRAM, 64KX16, 20ns, CMOS, PDSO44

71T016SA20PH2 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:SOP, TSOP44,.46,32
Reach Compliance Code:not_compliant风险等级:5.92
Base Number Matches:1

71T016SA20PH2 数据手册

 浏览型号71T016SA20PH2的Datasheet PDF文件第2页浏览型号71T016SA20PH2的Datasheet PDF文件第3页浏览型号71T016SA20PH2的Datasheet PDF文件第4页浏览型号71T016SA20PH2的Datasheet PDF文件第5页浏览型号71T016SA20PH2的Datasheet PDF文件第6页浏览型号71T016SA20PH2的Datasheet PDF文件第7页 
2.5V CMOS Static RAM  
for Automotive Applications  
1 Meg (64K x 16-Bit)  
IDT71T016SA  
Features  
Description  
64K x 16 advanced high-speed CMOS Static RAM  
TheIDT71T016isa1,048,576-bithigh-speedStaticRAMorganized  
as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneedsforautomotiveapplications.  
Equal access and cycle times  
Automotive:12/15/20ns  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
LVTTL-compatible  
Low power consumption via chip deselect  
Upper and Lower Byte Enable Pins  
Single 2.5V power supply  
TheIDT71T016has anoutputenablepinwhichoperates as fastas  
6ns,withaddressaccesstimesasfastas12ns.Allbidirectionalinputsand  
outputsoftheIDT71T016areLVTTL-compatibleandoperationisfroma  
single2.5Vsupply.Fullystaticasynchronouscircuitryisused,requiring  
noclocks orrefreshforoperation.  
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball  
Plastic FBGA packages  
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic  
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.  
Functional Block Diagram  
Output  
Enable  
Buffer  
O E  
Address  
Buffers  
Row / Column  
Decoders  
A0 – A15  
I/O15  
High  
Byte  
I/O  
8
8
Chip  
Enable  
CS  
Buffer  
Buffer  
I/O8  
Sense  
Amps  
and  
Write  
Drivers  
16  
64K x 16  
Memory  
Array  
Write  
Enable  
Buffer  
W E  
I/O7  
I/O0  
Low  
Byte  
I/O  
8
8
Buffer  
BHE  
BLE  
Byte  
Enable  
Buffers  
6473 drw 01  
AUGUST 2004  
1
©2004 IntegratedDeviceTechnology,Inc.  
DSC-6473/00  

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