Datasheet > 7164S55TPG8

7164S55TPG8

更新时间： 2024-11-15 00:21:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
10页	749K
描述
CMOS Static RAM 64K

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中文翻译

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数据手册

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7164S55TPG8 数据手册

◆

CMOS Static RAM

64K (8K x 8-Bit)

IDT7164S

IDT7164L

Features

Description

High-speed address/chip select access time

TheIDT7164isa65,536bithigh-speedstaticRAMorganizedas8K

x8.Itisfabricatedusinghigh-performance,high-reliabilityCMOStech-

nology.

– Military:20/25/35/45/55/70/85/100ns(max.)

– Industrial:20/25ns(max.)

– Commercial: 20/25ns (max.)

Low power consumption

Battery backup operation – 2V data retention voltage

(L Version only)

Produced with advanced CMOS high-performance

technology

Inputs and outputs directly TTL-compatible

Three-state outputs

Addressaccesstimesasfastas20nsareavailableandthecircuitoffers

a reduced power standby mode. When CS1 goes HIGH or CS2 goes

LOW,thecircuitwillautomaticallygoto,andremainin,alow-powerstand-

by mode. The low-power (L) version also offers a battery backup data

retention capability at power supply levels as low as 2V.

All inputs and outputs of the IDT7164 are TTL-compatible and

operation is from a single 5V supply, simplifying system designs. Fully

static asynchronous circuitry is used, requiring no clocks or refreshing

for operation.

Available in 28-pin DIP, CERDIP and SOJ

Military product compliant to MIL-STD-883, Class B

Green parts available, see ordering information

TheIDT7164ispackagedina28-pin300milCERDIP,a28-pin600

mil CERDIP, 300mil Plastic DIP and 300mil SOJ

Militarygradeproductismanufacturedincompliancewith MIL-STD-

883,ClassB,makingitideallysuitedtomilitarytemperatureapplications

demandingthehighestlevelofperformanceandreliability.

Functional Block Diagram

V_CC

GND

65,536 BIT

MEMORY ARRAY

ADDRESS

DECODER

I/O

I/O CONTROL

I/O

CONTROL

LOGIC

2967 drw 01

DECEMBER 2016

DSC-2967/17

12 3 4 5 6 7...10

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