Datasheet > 70T633S10BFG

70T633S10BFG

更新时间： 2022-12-29 21:22:09

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
27页	437K
描述
HIGH-SPEED 2.5V 512/256K x 18 ASYNCHRONOUS DUAL-PORT STATIC RAM

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70T633S10BFG 数据手册

IDT70T633/1S

High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

PinConfigurations^(1,2,3)(con't.)

03/12/03

11 12 13 14

16 17

I/O9L

12L

16L

13L

VSS

I/O8L

OPTL

TDO

SEM

INTL

VSS

A5L

TDI

17L

VDDQR

CE0L

BUSY

(4)

A10L

I/O7R

I/O9R

18L

14L

CE1L

A2L

I/O^8R

DDQL

DDQR

R/W

VSS

I/O10L

15L

11L

A7L

VDDQL

I/O7L

VDD

DDQR I/O10R

I/O11L

I/O6L

VSS

DDQL

VSS

I/O6R

DDQR

I/O^11R

I/O12L

DDQL

I/O5L

70T633/1BF

BF-208^(5,6)

VDD

VDDQR

I/O12R

I/O5R

DDQL

VDDQR

VDD

VSS

ZZR

208-Ball BGA

Top View⁽⁷⁾

DDQL

I/O3R

I/O4R

I/O14R

VSS

I/O13R

I/O14L

DDQR

I/O^15R

I/O13L

I/O3L

I/O4L

DDQL

I/O2R

DDQR

I/O15L

I/O1R

DDQL

I/O2L

I/O1L

I/O16R I/O16L

DDQR

I N T

VSS

16R

12R

A8R

TR S T

SEM

DDQL

I/O0R

DDQR

A5R

13R

14R

17R

TCK

CE0R

VSS

I/O17R

BUSY

(4)

A6R

A10R

CE1R

I/O17L

VDDQL TMS

A18R

R/WR

VDD

OPT

I/O0L

11R

A7R

VSS

M/S

15R

LBR

OER

5670 drw 02b

NOTES:

1. All VDD pins must be connected to 2.5V power supply.

2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VDD (2.5V), and 2.5V if OPT pin for that port is

set to VSS (0V).

3. All VSS pins must be connected to ground.

4. A18X is a NC for IDT70T631.

5. Package body is approximately 15mm x 15mm x 1.4mm with 0.8mm ball pitch.

6. This package code is used to reference the package diagram.

7. This text does not indicate orientation of the actual part-marking.

1 2 345 6 7...27

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