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70P249L65BYGI8 PDF预览

70P249L65BYGI8

更新时间: 2024-02-05 19:07:47
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
22页 147K
描述
Dual-Port SRAM, 4KX16, 40ns, CMOS, PBGA100, 0.50 MM PITCH, GREEN, BGA-100

70P249L65BYGI8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:BGA, BGA100,10X10,20针数:100
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.51
最长访问时间:40 ns其他特性:IT CAN OPERATE ALSO 2.5 TO 3 VOLT
I/O 类型:COMMONJESD-30 代码:S-PBGA-B100
JESD-609代码:e1内存密度:65536 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端口数量:2端子数量:100
字数:4096 words字数代码:4000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA100,10X10,20
封装形状:SQUARE封装形式:GRID ARRAY
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:1.8/3 V认证状态:Not Qualified
最大待机电流:0.000006 A子类别:SRAMs
最大压摆率:0.07 mA最大供电电压 (Vsup):1.9 V
最小供电电压 (Vsup):1.7 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
Base Number Matches:1

70P249L65BYGI8 数据手册

 浏览型号70P249L65BYGI8的Datasheet PDF文件第1页浏览型号70P249L65BYGI8的Datasheet PDF文件第2页浏览型号70P249L65BYGI8的Datasheet PDF文件第4页浏览型号70P249L65BYGI8的Datasheet PDF文件第5页浏览型号70P249L65BYGI8的Datasheet PDF文件第6页浏览型号70P249L65BYGI8的Datasheet PDF文件第7页 
IDT70P269/259/249L  
Low Power 16K/8K/4K x 16 Dual-Port Static RAM  
Industrial Temperature Range  
PinNames  
Left Port  
Right Port  
Description  
Chip Select (Input)  
CS  
WE  
OE  
L
CS  
WE  
OE  
R
Read/Write Enable (Input)  
Output Enable (Input)  
L
R
L
R
(1)  
(1)  
A0L - A13L  
A0R - A13R  
Address (Input)  
MSEL (2)  
L
MSEL (2)  
R
Mode Select (Input)  
Address/Data (Input/Output)  
Address Latch Enable (Input)  
Upper Byte Enable (Input)  
Lower Byte Enable (Input)  
Interrupt Flag (Output)  
I/O0L - I/O15L  
I/O0R - I/O15R  
(3)  
(3)  
ADV  
UB  
LB  
INT  
BUSY  
L
ADV  
UB  
LB  
INT  
BUSY  
SFEN  
IRR  
- IRR (4)  
ODR - ODR  
R
L
R
NOTES:  
1. A13 - A0 for IDT70P269; A12 - A0 for IDT70P259; A11 - A0 for IDT70P249.  
2. MSEL = 0 for Standard SRAM operation, MSEL = 1 for Address/Data Mux  
(ADM) operation.  
L
R
L
R
3. ADV is only used when the port is in ADM mode.  
Busy Flag (Output)  
L
R
4. IRR0 is A13L and IRR1 is A13R for 70P269.  
Special Function Enable (Input)  
Input Read Register (Inputs)  
Output Drive Register (Outputs)  
Core Power Supply (Input)  
Ground (Input)  
0
1
0
4
VDD  
VSS  
VDDIO  
L
Left Port Power Supply (Input)  
Right Port Power Supply (Input)  
VDDIO  
R
7146 tbl 01  
Truth Table I: ADM Interface Read/Write Control  
Inputs  
Outputs  
I/O0 - I/O15  
High-Z  
Mode  
Deselected/Power Down  
ADV  
X
CS  
H
X
X
L
WE  
X
OE  
X
H
X
L
UB  
X
X
H
L
LB  
X
X
H
L
X
X
High-Z  
Output Disable  
X
X
High-Z  
Upper and Lower Bytes Deselected  
) Read Upper and Lower Bytes  
Pulse  
H
DATAOUT (I/O  
0
- I/O15  
- I/O  
DATAOUT (I/O  
0
7
)
)
Pulse  
L
H
L
H
L
High-Z (I/O - I/O15  
8
Read Lower Byte Only  
High-Z (I/O0 - I/O7)  
DATAOUT (I/O8 - I/O15  
Pulse  
Pulse  
Pulse  
L
L
L
H
L
L
L
X
X
L
L
H
H
L
L
)
Read Upper Byte Only  
DATAIN (I/O0 - I/O15  
)
Write Upper and Lower Bytes  
DATAIN (I/O0 - I/O7)  
High-Z (I/O8 - I/O15  
)
Write Lower Byte Only  
Write Upper Byte Only  
High-Z (I/O0 - I/O7)  
DATAIN (I/O8 - I/O15)  
Pulse  
L
L
X
L
H
7146 tbl 02a  
OCTOBER 16, 2008  
6.42  
3

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