6N134,* 81028, HCPL-563X, HCPL-663X,
HCPL-565X, 5962-98001, HCPL-268K,
HCPL-665X, 5962-90855, HCPL-560X
Hermetically Sealed, High Speed, High CMR, Logic Gate Optocouplers
Data Sheet
*See matrix for available extensions.
Features
Description
Dual marked with device part number and DLA
These units are single, dual and quad channel, hermeti-
cally sealed optocouplers. The products are capable of
operation and storage over the full military temperature
range and can be purchased as either standard product
or with full MIL-PRF-38534 Class Level H or K testing or
from the appropriate DLA Drawing. All devices are man-
ufactured and tested on a MIL-PRF-38534 certified line
and are included in the DLA Qualified Manufacturers
List QML-38534 for Hybrid Microcircuits. Quad channel
devices are available by special order in the 16 pin DIP
through hole packages.
drawing number
Manufactured and tested on a MIL-PRF-38534
Certified Line
QML-38534, Class H and K
Five hermetically sealed package configurations
Performance guaranteed over full military
temperature range: -55°C to +125°C
High speed: 10 Mbd typical
CMR: > 10,000 V/μs typical
1500 Vdc withstand test voltage
2500 Vdc withstand test voltage for HCPL-565X
High radiation immunity
Functional Diagram
V
CC
6N137, HCPL-2601, HCPL-2630/31 function
V
E
compatibility
V
OUT
Reliability data
TTL circuit compatibility
GND
Applications
Military and aerospace
Multiple channel devices available
High reliability systems
Truth Table (Positive Logic)
Transportation, medical, and life critical systems
Line receiver
Multichannel Devices
Input
On (H)
Off (L)
Output
Voltage level shifting
L
Isolated input line receiver
Isolated output line driver
Logic ground isolation
H
Single Channel DIP
Harsh industrial environments
Input
On (H)
Off (L)
On (H)
Off (L)
Enable
Output
Isolation for computer, communication, and test
H
H
L
L
equipment systems
H
H
H
L
The connection of a 0.1 μF bypass capacitor between VCC and GND is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.