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5V41315NLGI8 PDF预览

5V41315NLGI8

更新时间: 2024-11-25 01:07:39
品牌 Logo 应用领域
艾迪悌 - IDT 时钟PC输出元件外围集成电路晶体
页数 文件大小 规格书
16页 310K
描述
2 OUTPUT PCIE GEN1-2-3 SYNTHESIZER

5V41315NLGI8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.2
JESD-30 代码:S-XQCC-N16JESD-609代码:e3
长度:3 mm湿度敏感等级:3
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:200 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:25 MHz
座面最大高度:1 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

5V41315NLGI8 数据手册

 浏览型号5V41315NLGI8的Datasheet PDF文件第2页浏览型号5V41315NLGI8的Datasheet PDF文件第3页浏览型号5V41315NLGI8的Datasheet PDF文件第4页浏览型号5V41315NLGI8的Datasheet PDF文件第5页浏览型号5V41315NLGI8的Datasheet PDF文件第6页浏览型号5V41315NLGI8的Datasheet PDF文件第7页 
DATASHEET  
2 OUTPUT PCIE GEN1-2-3 SYNTHESIZER  
IDT5V41315  
Recommended Applications  
Features/Benefits  
PCIe Gen1-2-3 Synthesizer for Common and  
SRNS-clocked systems  
16-pin TSSOP or VFQFPN package; small board  
footprint  
Outputs can be terminated to LVDS; can drive a wider  
variety of devices  
General Description  
OE control pin; greater system power management  
The IDT5V41315 is a PCIe Gen1-2-3 clock synthesizer  
suitable for use in both Common-Clocked and Separate  
Reference clock with No Spread (SRNS) timing  
architectures. The IDT5V41315 uses a 25MHz input to  
generate 4 different output frequencies. The output  
frequency is selectable via select pins.  
Industrial temperature range available; supports  
demanding embedded applications  
Key Specifications  
Cycle-to-cycle jitter: 80ps  
Output-to-output skew: <50 ps  
Output Features  
PCIe Gen2 phase jitter: <3.0ps RMS (Common Clock)  
PCIe Gen3 phase jitter: <1.0ps RMS (Common Clock)  
Low Phase Noise: 12KHz to 20MHz <6ps RMS  
2 - 0.7V current mode differential HCSL output pairs  
Block Diagram  
VDD  
2
CLK0  
CLK0  
Control  
Logic  
S1:S0  
2
Phase Lock Loop  
CLK1  
CLK1  
X1/ICLK  
Clock  
Buffer/  
Crystal  
Oscillator  
25 MHz  
crystal or clock  
X2  
2
Optional tuning crystal  
capacitors  
Rr(IREF)  
GND  
OE  
IDT® 2 OUTPUT PCIE GEN1-2-3 SYNTHESIZER  
1
IDT5V41315  
MAY 8, 2017  

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