AD9020
Figure 5 shows a reference circuit that nulls out the offset errors
using two op amps, and provides appropriate voltage references
to the quarter-point taps. Feedback from the sense lines causes
the op amps to compensate for the offset errors. The two tran-
sistors limit the amount of current drawn directly from the op
amps; resistors at the base connections stabilize their operation.
The 10 kΩ resistors (R1–R4) between the voltage sense lines
form an external resistor ladder; the quarter point voltages are
taken off this external ladder and buffered by an op amp. The
actual values of resistors R1–R4 are not critical, but they should
match well and be large enough (≥10 kΩ) to limit the amount
of current drawn from the voltage sense lines.
10.0
9.0
62
56
50
8.0
7.0
6.0
5.0
44
38
32
The select resistors (RS) shown in the schematic (each pair can be
a potentiometer) are chosen to adjust the quarter-point voltage
references, but are not necessary if R1–R4 match within 0.05%.
0.4
0.6
1.0
؎V
1.2
1.4
– Volts
1.6
1.8
2.0
0.8
SENSE
An alternative approach for defining the quarter-point references
of the resistor ladder is to evaluate the integral linearity error of
an individual device, and adjust the voltage at the quarter-points
to minimize this error. This may improve the low frequency ac
performance of the converter.
Figure 4. SNR and ENOB vs. Reference Voltage
Applying a voltage greater than 4 V across the internal resistor
ladder will cause current densities to exceed rated values, and
may cause permanent damage to the AD9020. The design
of the reference circuit should limit the voltage available to
the references.
Performance of the AD9020 has been optimized with an analog
input voltage of 1.75 V (as measured at
VSENSE). If the analog
Analog Input Signal
input range is reduced below these values, relatively larger differ-
ential nonlinearity errors may result because of comparator
mismatches. As shown in Figure 4, performance of the converter
The signal applied to ANALOG IN drives the inputs of 512
parallel comparator cells (see Figure 6). This connection typi-
cally has an input resistance of 7 kΩ, and input capacitance of
45 pF. The input capacitance is nearly constant over the ana-
log input voltage range, as shown in the graph that illustrates
that characteristic.
is a function of VSENSE
.
The analog input signal should be driven from a low-distortion,
low-noise amplifier. A good choice is the AD9617, a wide
bandwidth, monolithic operational amplifier with excellent ac
and dc performance. The input capacitance should be isolated
by a small series resistor (24 Ω for the AD9617) to improve the
ac performance of the amplifier (see Figure 14).
REV. C
–8–