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5962-9232404MYA PDF预览

5962-9232404MYA

更新时间: 2024-11-02 14:48:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
18页 1020K
描述
Non-Volatile SRAM, 8KX8, 55ns, CMOS, CQCC28, CERAMIC, LCC-28

5962-9232404MYA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:CERAMIC, LCC-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.41
风险等级:5.74最长访问时间:55 ns
其他特性:SOFTWARE STORE/RECALLJESD-30 代码:R-CQCC-N28
长度:13.97 mm内存密度:65536 bit
内存集成电路类型:NON-VOLATILE SRAM内存宽度:8
湿度敏感等级:1功能数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC28,.35X.55
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
筛选级别:MIL-STD-883座面最大高度:2.29 mm
最大待机电流:0.002 A子类别:SRAMs
最大压摆率:0.07 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.89 mm
Base Number Matches:1

5962-9232404MYA 数据手册

 浏览型号5962-9232404MYA的Datasheet PDF文件第2页浏览型号5962-9232404MYA的Datasheet PDF文件第3页浏览型号5962-9232404MYA的Datasheet PDF文件第4页浏览型号5962-9232404MYA的Datasheet PDF文件第5页浏览型号5962-9232404MYA的Datasheet PDF文件第6页浏览型号5962-9232404MYA的Datasheet PDF文件第7页 
STK11C68-5 (SMD5962-92324)  
64 Kbit (8 K x 8) SoftStore nvSRAM  
Features  
Functional Description  
35 ns, 45 ns, and 55 ns access times  
Pin compatible with industry standard SRAMs  
Software initiated nonvolatile STORE  
Unlimited Read and Write endurance  
Automatic RECALL to SRAM on power-up  
Unlimited RECALL cycles  
The Cypress STK11C68-5 is a 64 Kb fast static RAM with a  
nonvolatile element in each memory cell. The embedded  
nonvolatile elements incorporate QuantumTrap technology to  
produce the world’s most reliable nonvolatile memory. The  
SRAM provides unlimited read and write cycles, while  
independent nonvolatile data resides in the highly reliable  
QuantumTrap cell. Data transfers under software control from  
SRAM to the nonvolatile elements (the STORE operation). On  
power-up, data is automatically restored to the SRAM (the  
RECALL operation) from the nonvolatile memory. RECALL  
operations are also available under software control.  
1,000,000 STORE cycles  
100 year data retention  
For a complete list of related documentation, click here.  
Single 5 V ± 10% operation  
Military temperature  
28-pin (300 mil) CDIP and 28-pad LCC packages  
Logic Block Diagram  
V
V
CAP  
CC  
Quantum Trap  
128 X 512  
A5  
POWER  
STORE  
CONTROL  
A6  
A7  
RECALL  
STORE/  
RECALL  
STATIC RAM  
A8  
HSB  
ARRAY  
128 X 512  
CONTROL  
A9  
A11  
A12  
SOFTWARE  
DETECT  
A0  
-A12  
DQ0  
COLUMN I/O  
DQ1  
DQ2  
DQ3  
COLUMN DEC  
DQ4  
DQ5  
A0  
A4  
A10  
A1  
A3  
A2  
DQ6  
DQ7  
OE  
CE  
WE  
Cypress Semiconductor Corporation  
Document Number: 001-51001 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 2, 2015  

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