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552-02SCMGI PDF预览

552-02SCMGI

更新时间: 2024-09-18 01:03:31
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
12页 377K
描述
Low Skew 2-input MUX and 1 to 8 Clock Buffer

552-02SCMGI 数据手册

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Low Skew 2-input MUX and 1 to 8 Clock Buffer  
552-02S  
DATASHEET  
Description  
Features  
The 552-02S is a low skew, single-input to eight- output clock  
buffer. The device offers a dual input with pin select for  
switching between two clock sources. It has best in class  
Additive Phase Jitter of sub 50fsec  
Low RMS Additive Phase Jitter: 50fs  
Low output skew: 50ps  
Operating Voltages of 1.8V to 3.3V  
Packaged in 16-pin TSSOP and 16-pin VFQFN, Pb-free  
Input clock multiplexer simplifies clock selection  
Output Enable pin tri-states outputs  
Input/Output clock frequency up to 200 MHz  
Low power CMOS technology  
IDT makes many non-PLL and PLL based low skew output  
devices as well as Zero Delay Buffers to synchronize clocks.  
Contact us for all of your clocking needs.  
3.3V tolerant inputs  
Extended temperature (-40°C to +105°C)  
Block Diagram  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
INA  
INB  
1
0
SELA  
OE  
552-02S APRIL 18, 2017  
1
©2017 Integrated Device Technology, Inc.  

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